Re: 4M kernel pages

["David Mentr\\'e" <David.Mentre@irisa.fr>]

Petko Manolov <petkan@varel.bg> writes:

> Yes, i know that. I took a look at 
> linux/arch/i386/mm/init.c - paging_init().
> Yes we rise PSE bit in cr4 but don't rise the PS bit in
> the pade directory entry for the kernel - which means the
> kernel is in 4K pages.

Not exactly. 4MB pages for kernel are setted up _before_ the kernel is
started.
Look at arch/i386/kernel/head.S:


(around line 55 -- for the first CPU I suppose):

/*
 *      New page tables may be in 4Mbyte page mode and may
 *      be using the global pages. 
 *
 *      NOTE! We have to correct for the fact that we're
 *      not yet offset PAGE_OFFSET..
 */
#define cr4_bits mmu_cr4_features-__PAGE_OFFSET
        movl %cr4,%eax          # Turn on 4Mb pages
        orl cr4_bits,%eax
        movl %eax,%cr4
#endif



(around line 214 -- for other SMP CPUs I suppose):

        movb ready,%al          # First CPU if 0
        orb %al,%al
        jz 4f                   # First CPU skip this stuff
----->  movl %cr4,%eax          # Turn on 4Mb pages <------
        orl $16,%eax
        movl %eax,%cr4
        movl %cr3,%eax          # Intel specification clarification says
        movl %eax,%cr3          # to do this. Maybe it makes a difference.
                                # Who knows ?

To be honest, I'm not sure that this is done here, but I'm *sure* that
kernel uses 4Mb pages.

Best regards,
d.
-- 
 David.Mentre@irisa.fr -- http://www.irisa.fr/prive/dmentre/
 Opinions expressed here are only mine.
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