From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA08AC433F5 for ; Tue, 26 Oct 2021 22:46:15 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 558476109E for ; Tue, 26 Oct 2021 22:46:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 558476109E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=dabbelt.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvack.org Received: by kanga.kvack.org (Postfix) id E4D516B0073; Tue, 26 Oct 2021 18:46:14 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id DFCAA80007; Tue, 26 Oct 2021 18:46:14 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id CEC68940007; Tue, 26 Oct 2021 18:46:14 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0050.hostedemail.com [216.40.44.50]) by kanga.kvack.org (Postfix) with ESMTP id C09A76B0073 for ; Tue, 26 Oct 2021 18:46:14 -0400 (EDT) Received: from smtpin08.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay03.hostedemail.com (Postfix) with ESMTP id 7BA098249980 for ; Tue, 26 Oct 2021 22:46:14 +0000 (UTC) X-FDA: 78740073468.08.802EDB9 Received: from mail-pl1-f173.google.com (mail-pl1-f173.google.com [209.85.214.173]) by imf16.hostedemail.com (Postfix) with ESMTP id 2D5B0F0000A6 for ; Tue, 26 Oct 2021 22:46:09 +0000 (UTC) Received: by mail-pl1-f173.google.com with SMTP id y1so592761plk.10 for ; Tue, 26 Oct 2021 15:46:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dabbelt-com.20210112.gappssmtp.com; s=20210112; h=date:subject:in-reply-to:cc:from:to:message-id:mime-version :content-transfer-encoding; bh=iIMkXweimO7pawEkHuFr2l7SgIpFt/lxrub1AQqGQnY=; b=mfiNVg6qzbbOe9p7cElyDtbR6+i1Je1PPN5ulfwoHDvgdRn5c/bMna3FdC/q+f6Wo1 gsoCm2y1//+UUrFvZHWjg2OZPFpd2OaWnb+wHgaBDRtdS5IXTeyMpcLMqSdKJzxmqv9b pGXn/Wvv0ape9Mh6U40KkkRyQdzEs7m80odLU9zF8XSJuUDUDMY2aBakM4nG5Ku4OEwu GuQ9zD5CeRsw/ApYXoFdrvHwk0YPejg12P600Uoak+0TefMofnKaTzM1TRXTqDe2Nrqd fIn3Pb8D8SDTnY0PxqcpC5l4CLpVSdxt/7N6p/oQ9MCL4otKNMNsBTza3Nw1GVB/Xmce TM0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:subject:in-reply-to:cc:from:to:message-id :mime-version:content-transfer-encoding; bh=iIMkXweimO7pawEkHuFr2l7SgIpFt/lxrub1AQqGQnY=; b=cycD547suTikF/PR4eTl3LW6HwmO46kaixWzb1f9CxvXca44K3t6ubaDVQgpApkpEE 2ntJeUHFuxbThtVGEfq+DjqKf0Ntz+HUXe/9wNxbjcaV2N4Ju4xhfR+yzjcwZF05r2DG uNMOht0Jb56qTR34ez4aw1HWiCj+nUAyYeK3HIXmbHWrgwcL0ujzMyTI832MpOc6I1vm d13JhbBhH9AE2BflCR645rcZLilILe9p862lmRt79kawn/AOLAYbMOaMdtJUjqkfTM+M bDc7DUafJYj6P9a0m1PytdDckI4I+FNCXR82WTPD+TF3+Vlf++GKRuV1lK1/4qe8o2WQ Z94w== X-Gm-Message-State: AOAM533MRE2xETv0+LaVrmr+gUHo86cqdb7GoQXrFLt5QVM4djDbqRt8 zr4RTxzJKCFEjyqjR7lVLABcyw== X-Google-Smtp-Source: ABdhPJwHXd7GO0zZiMnfYQHChi+GRzh97ptsyZyPOv1UHPY24b3nwrwcyzk1vExOjXE30LVzSNA0nw== X-Received: by 2002:a17:902:6ac7:b0:140:14d5:cfb6 with SMTP id i7-20020a1709026ac700b0014014d5cfb6mr24814432plt.58.1635288372888; Tue, 26 Oct 2021 15:46:12 -0700 (PDT) Received: from localhost ([2620:0:1000:5e10:676c:ab93:f48d:23ae]) by smtp.gmail.com with ESMTPSA id h2sm1822528pjk.44.2021.10.26.15.46.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Oct 2021 15:46:12 -0700 (PDT) Date: Tue, 26 Oct 2021 15:46:12 -0700 (PDT) X-Google-Original-Date: Tue, 26 Oct 2021 15:46:09 PDT (-0700) Subject: Re: [PATCH] riscv: remove .text section size limitation for XIP In-Reply-To: <20211011091414.1998846-1-vitaly.wool@konsulko.com> CC: linux-riscv@lists.infradead.org, alex@ghiti.fr, jszhang@kernel.org, linux-mm@kvack.org, nico@fluxnic.net, vitaly.wool@konsulko.com From: Palmer Dabbelt To: vitaly.wool@konsulko.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: 2D5B0F0000A6 X-Stat-Signature: mxtpc5wckf6qbbk984e9dd1nkgohi6pt Authentication-Results: imf16.hostedemail.com; dkim=pass header.d=dabbelt-com.20210112.gappssmtp.com header.s=20210112 header.b=mfiNVg6q; dmarc=none; spf=pass (imf16.hostedemail.com: domain of palmer@dabbelt.com designates 209.85.214.173 as permitted sender) smtp.mailfrom=palmer@dabbelt.com X-HE-Tag: 1635288369-106216 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Mon, 11 Oct 2021 02:14:14 PDT (-0700), vitaly.wool@konsulko.com wrote: > Currently there's a limit of 8MB for the .text section of a RISC-V > image in the XIP case. This breaks compilation of many automatic > builds and is generally inconvenient. This patch removes that > limitation and optimizes XIP image file size at the same time. > > Signed-off-by: Vitaly Wool > --- > arch/riscv/include/asm/pgtable.h | 6 ++++-- > arch/riscv/kernel/head.S | 12 ++++++++++++ > arch/riscv/kernel/vmlinux-xip.lds.S | 10 +++++++--- > arch/riscv/mm/init.c | 7 +++---- > 4 files changed, 26 insertions(+), 9 deletions(-) > > diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/= pgtable.h > index 39b550310ec6..bf204e7c1f74 100644 > --- a/arch/riscv/include/asm/pgtable.h > +++ b/arch/riscv/include/asm/pgtable.h > @@ -75,7 +75,8 @@ > #endif > > #ifdef CONFIG_XIP_KERNEL > -#define XIP_OFFSET SZ_8M > +#define XIP_OFFSET SZ_32M > +#define XIP_OFFSET_MASK (SZ_32M - 1) > #else > #define XIP_OFFSET 0 > #endif > @@ -97,7 +98,8 @@ > #ifdef CONFIG_XIP_KERNEL > #define XIP_FIXUP(addr) ({ \ > uintptr_t __a =3D (uintptr_t)(addr); \ > - (__a >=3D CONFIG_XIP_PHYS_ADDR && __a < CONFIG_XIP_PHYS_ADDR + SZ_16M= ) ? \ > + (__a >=3D CONFIG_XIP_PHYS_ADDR && \ > + __a < CONFIG_XIP_PHYS_ADDR + XIP_OFFSET * 2) ? \ > __a - CONFIG_XIP_PHYS_ADDR + CONFIG_PHYS_RAM_BASE - XIP_OFFSET :\ > __a; \ > }) > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > index fce5184b22c3..ed316d02cd7e 100644 > --- a/arch/riscv/kernel/head.S > +++ b/arch/riscv/kernel/head.S > @@ -20,10 +20,20 @@ > REG_L t0, _xip_fixup > add \reg, \reg, t0 > .endm > +.macro XIP_FIXUP_FLASH_OFFSET reg > + la t1, __data_loc > + li t0, XIP_OFFSET_MASK > + and t1, t1, t0 > + li t1, XIP_OFFSET > + sub t0, t0, t1 > + sub \reg, \reg, t0 > +.endm > _xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_O= FFSET > #else > .macro XIP_FIXUP_OFFSET reg > .endm > +.macro XIP_FIXUP_FLASH_OFFSET reg > +.endm > #endif /* CONFIG_XIP_KERNEL */ > > __HEAD > @@ -266,6 +276,7 @@ pmp_done: > la a3, hart_lottery > mv a2, a3 > XIP_FIXUP_OFFSET a2 > + XIP_FIXUP_FLASH_OFFSET a3 > lw t1, (a3) > amoswap.w t0, t1, (a2) > /* first time here if hart_lottery in RAM is not set */ > @@ -304,6 +315,7 @@ clear_bss_done: > XIP_FIXUP_OFFSET sp > #ifdef CONFIG_BUILTIN_DTB > la a0, __dtb_start > + XIP_FIXUP_OFFSET a0 > #else > mv a0, s1 > #endif /* CONFIG_BUILTIN_DTB */ > diff --git a/arch/riscv/kernel/vmlinux-xip.lds.S b/arch/riscv/kernel/vm= linux-xip.lds.S > index 9c9f35091ef0..f5ed08262139 100644 > --- a/arch/riscv/kernel/vmlinux-xip.lds.S > +++ b/arch/riscv/kernel/vmlinux-xip.lds.S > @@ -64,8 +64,11 @@ SECTIONS > /* > * From this point, stuff is considered writable and will be copied to= RAM > */ > - __data_loc =3D ALIGN(16); /* location in file */ > - . =3D LOAD_OFFSET + XIP_OFFSET; /* location in memory */ > + __data_loc =3D ALIGN(PAGE_SIZE); /* location in file */ > + . =3D KERNEL_LINK_ADDR + XIP_OFFSET; /* location in memory */ > + > +#undef LOAD_OFFSET > +#define LOAD_OFFSET (KERNEL_LINK_ADDR + XIP_OFFSET - (__data_loc & XIP= _OFFSET_MASK)) > > _sdata =3D .; /* Start of data section */ > _data =3D .; > @@ -96,7 +99,6 @@ SECTIONS > KEEP(*(__soc_builtin_dtb_table)) > __soc_builtin_dtb_table_end =3D .; > } > - PERCPU_SECTION(L1_CACHE_BYTES) > > . =3D ALIGN(8); > .alternative : { > @@ -122,6 +124,8 @@ SECTIONS > > BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 0) > > + PERCPU_SECTION(L1_CACHE_BYTES) > + > .rel.dyn : AT(ADDR(.rel.dyn) - LOAD_OFFSET) { > *(.rel.dyn*) > } > diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c > index c0cddf0fc22d..24b2b8044602 100644 > --- a/arch/riscv/mm/init.c > +++ b/arch/riscv/mm/init.c > @@ -41,7 +41,7 @@ phys_addr_t phys_ram_base __ro_after_init; > EXPORT_SYMBOL(phys_ram_base); > > #ifdef CONFIG_XIP_KERNEL > -extern char _xiprom[], _exiprom[]; > +extern char _xiprom[], _exiprom[], __data_loc; > #endif > > unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] > @@ -454,10 +454,9 @@ static uintptr_t __init best_map_size(phys_addr_t = base, phys_addr_t size) > /* called from head.S with MMU off */ > asmlinkage void __init __copy_data(void) > { > - void *from =3D (void *)(&_sdata); > - void *end =3D (void *)(&_end); > + void *from =3D (void *)(&__data_loc); > void *to =3D (void *)CONFIG_PHYS_RAM_BASE; > - size_t sz =3D (size_t)(end - from + 1); > + size_t sz =3D (size_t)((uintptr_t)(&_end) - (uintptr_t)(&_sdata)); > > memcpy(to, from, sz); > } Thanks, this is on for-next.