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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id b4sm3260291pfv.188.2021.04.27.20.35.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Apr 2021 20:35:21 -0700 (PDT) Date: Tue, 27 Apr 2021 20:35:21 -0700 (PDT) X-Google-Original-Date: Tue, 27 Apr 2021 20:35:19 PDT (-0700) Subject: Re: [PATCH v8] RISC-V: enable XIP In-Reply-To: <20210428030824.GA196954@roeck-us.net> CC: alex@ghiti.fr, Paul Walmsley , aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, vitaly.wool@konsulko.com From: Palmer Dabbelt To: linux@roeck-us.net Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed X-Rspamd-Server: rspam03 X-Rspamd-Queue-Id: BEE0140002D9 X-Stat-Signature: touia6nxrcqhmzfmigo7ktp9tndxmr3n Received-SPF: none (dabbelt.com>: No applicable sender policy available) receiver=imf02; identity=mailfrom; envelope-from=""; helo=mail-pl1-f174.google.com; client-ip=209.85.214.174 X-HE-DKIM-Result: pass/pass X-HE-Tag: 1619580892-762473 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Tue, 27 Apr 2021 20:08:24 PDT (-0700), linux@roeck-us.net wrote: > On Tue, Apr 13, 2021 at 02:35:14AM -0400, Alexandre Ghiti wrote: >> From: Vitaly Wool >> >> Introduce XIP (eXecute In Place) support for RISC-V platforms. >> It allows code to be executed directly from non-volatile storage >> directly addressable by the CPU, such as QSPI NOR flash which can >> be found on many RISC-V platforms. This makes way for significant >> optimization of RAM footprint. The XIP kernel is not compressed >> since it has to run directly from flash, so it will occupy more >> space on the non-volatile storage. The physical flash address used >> to link the kernel object files and for storing it has to be known >> at compile time and is represented by a Kconfig option. >> >> XIP on RISC-V will for the time being only work on MMU-enabled >> kernels. >> >> Signed-off-by: Alexandre Ghiti [ Rebase on top of "Mov= e >> kernel mapping outside the linear mapping" ] >> Signed-off-by: Vitaly Wool >> Reported-by: Naresh Kamboju > > In next-20210426, when building riscv:allnoconfig or riscv:tinyconfig: > > arch/riscv/kernel/setup.c: In function 'setup_arch': > arch/riscv/kernel/setup.c:284:32: error: implicit declaration of functi= on 'XIP_FIXUP' Sorry about that. I thought I'd fixed the last build, but I guess I=20 managed to just miss these build failures in a spew of successes. I=20 just sent out a patch to fix it.