Re: [PATCH 1/1] riscv: Fix P4D_SHIFT definition for 3-level page table mode

[Palmer Dabbelt <palmer@dabbelt.com>]

On Thu, 01 Dec 2022 05:51:28 PST (-0800), alexghiti@rivosinc.com wrote:
> RISC-V kernels support 3,4,5-level page tables at runtime by folding
> upper levels.
>
> In case of a 3-level page table, PGDIR is folded into P4D which in turn
> is folded into PUD: PGDIR_SHIFT value is correctly set to the same value
> as PUD_SHIFT, but P4D_SHIFT is not, then any use of P4D_SHIFT will access
> invalid address bits (all set to 1).
>
> Fix this by dynamically defining P4D_SHIFT value, like we already do for
> PGDIR_SHIFT.
>
> Fixes: d10efa21a937 ("riscv: mm: Control p4d's folding by pgtable_l5_enabled")
> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
> ---
>  arch/riscv/include/asm/pgtable-64.h | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/pgtable-64.h b/arch/riscv/include/asm/pgtable-64.h
> index dc42375c2357..42a042c0e13e 100644
> --- a/arch/riscv/include/asm/pgtable-64.h
> +++ b/arch/riscv/include/asm/pgtable-64.h
> @@ -25,7 +25,11 @@ extern bool pgtable_l5_enabled;
>  #define PGDIR_MASK      (~(PGDIR_SIZE - 1))
>
>  /* p4d is folded into pgd in case of 4-level page table */
> -#define P4D_SHIFT      39
> +#define P4D_SHIFT_L3   30
> +#define P4D_SHIFT_L4   39
> +#define P4D_SHIFT_L5   39
> +#define P4D_SHIFT      (pgtable_l5_enabled ? P4D_SHIFT_L5 : \
> +		(pgtable_l4_enabled ? P4D_SHIFT_L4 : P4D_SHIFT_L3))
>  #define P4D_SIZE       (_AC(1, UL) << P4D_SHIFT)
>  #define P4D_MASK       (~(P4D_SIZE - 1))

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>

Too late for this week, but if someone's got a concrete regression then 
I'm happy to take it next week.  Otherwise it'll end up on for-next, 
it'll be backported anyway but this way it'll have a touch more time.

Thanks!