From mboxrd@z Thu Jan 1 00:00:00 1970 Subject: Re: scalable kmap (was Re: vm lock contention reduction) References: From: ebiederm@xmission.com (Eric W. Biederman) Date: 08 Jul 2002 04:15:04 -0600 In-Reply-To: Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Sender: owner-linux-mm@kvack.org Return-Path: To: Linus Torvalds Cc: "Martin J. Bligh" , Andrew Morton , Andrea Arcangeli , Rik van Riel , "linux-mm@kvack.org" List-ID: Linus Torvalds writes: > Hmm.. Right now we have the same IDT and GDT on all CPU's, so _if_ the CPU > is stupid enough to do a locked cycle to update the "A" bit on the > segments (even if it is already set), you would see horrible cacheline > bouncing for any interrupt. > > I don't know if that is the case. I'd _assume_ that the microcode was > clever enough to not do this, but who knows. It should be fairly easily > testable (just "SMOP") by duplicating the IDT/GDT across CPU's. If you don't carry about the "A" bit and I don't think we do this is trivial preventable. You can set when you initialize the GDT/IDT and it will never be updated. I had to make this change a while ago in LinuxBIOS because P4's lock up when you load a GDT from a ROM that doesn't have the accessed bit set. The fact it doesn't lock up is a fairly good proof that no writes happen when the accessed bit is already set. Eric -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/