From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id C52E9C021B1 for ; Thu, 20 Feb 2025 16:54:13 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 628932802F2; Thu, 20 Feb 2025 11:54:13 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 5D6E22802ED; Thu, 20 Feb 2025 11:54:13 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 49E662802F2; Thu, 20 Feb 2025 11:54:13 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id 2C9E02802ED for ; Thu, 20 Feb 2025 11:54:13 -0500 (EST) Received: from smtpin22.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay06.hostedemail.com (Postfix) with ESMTP id C95C1B82C9 for ; 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Rspam-User: X-Rspamd-Queue-Id: AA23D16000B X-Stat-Signature: afhbhubc49e9qy1dkfpp7dpryqtgk87s X-Rspamd-Server: rspam03 X-HE-Tag: 1740070450-288910 X-HE-Meta: U2FsdGVkX19z/WZABEXwhFiFSzoHjea8WsJZLVOUR7VZ72M+ywLCTalHiJOxqLXypGHNNcOJEURpUubpLqCyrpCRs0Jq494Rb7DLkcRfAZQ6zYroNRnJmauOz1SRlAIBRmCnQrFqw0PXDwokRUlkp1sH91LZ+giIJfAH8QSeDQMV/rbWwNgYRW+EKvn6gtwvmw4mbgiKBw/nY6Dbzbyq0bXJ83pvFhdGglmEqgk+IRCDrzHI68Zv4Vu6nFfbGp3oDyAte+ZFNYYtuhvcOpqROd+D+nj38Lj0J3scN3d3gh6/r1pkU3YRHSKfYz/0GbdAeHzt0ycPiVsLNry2w3RUc6RUwTtM2/f0pulxC2ARHO82FvmXA7mMmDrPXAJ/AT+OVSDZGc3CSbEwG9D7v73FN2LoSfE7a3FEJw++n6MhTbX75n9VqKvZLEgh0MsTkt2SzNXKVRHxcjv65HeCYcqmRJ+jOMB1mXsUCUt7FQl2RMuW3TNbF7pOslObfe8pVEIYNBtmmecvahcfODoC49917Ok41qCwNLXqqtgPZpAJ4SJZeQtliTWiChlSpfMXvaTzPZ768aQTBPDHyjqprEoz/KwDLuF/JTxiC5sjvo2hqyXgSOYzGqGHosqbPqKPbzbxrsiL5sUu2zJd6rWcKW22//oY2q5sRoXbDr2/D3ggw5UdOIwKdcMF6o2/zRGwGZb4vA1mZPYPiSH1n73JzkSBXSRznWZ/Jkt80JSm0AMvyDQIq5qtRF6OVWHlON8ZJvyXfLdjtIWVq3Zx5pYND52TlCVYy+flWfIMyL5AZJ24aepAYS6kUOaXaUfXeHObJ6nRdc1og3ha6BndgJBQEpamXtl0mHkwMEFUywo6jKyLcjV4BqKGpvKqgkJDA9Iq3czMCxCfn1+2cgQh+ZJWeXxA/l34B9LJlfMf5ZCJnmMIXGEuYALBBfGk7V2jvPYXvF51mo3+y3e3Ih60GfzFGXX 1KPzUPzk CEXaJJVOAqPn6moPlmFQl7Q9C3QUIM4b2C//v0HURgwloMn/W5cXQ7zxgAxThF400UgyA/fTs/NpS02baZDGQVdCyahuEv1RMuoypH88g9Yl0jIzZQStrBV8M9ZtAJ4xEIE0wHMyX2Db5pNwEzRPibvBW2g== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On 17/02/2025 15:07, Ryan Roberts wrote: > __set_pte_complete(), set_pmd(), set_pud(), set_p4d() and set_pgd() are Nit: it would be more accurate to say __set_pte() instead of __set_pte_complete(), as it is the former that actually writes the PTE (and then issues barriers). > used to write entries into pgtables. And they issue barriers (currently > dsb and isb) to ensure that the written values are observed by the table > walker prior to any program-order-future memory access to the mapped > location. > > Over the years some of these functions have received optimizations: In > particular, commit 7f0b1bf04511 ("arm64: Fix barriers used for page > table modifications") made it so that the barriers were only emitted for > valid-kernel mappings for set_pte() (now __set_pte_complete()). And > commit 0795edaf3f1f ("arm64: pgtable: Implement p[mu]d_valid() and check > in set_p[mu]d()") made it so that set_pmd()/set_pud() only emitted the > barriers for valid mappings. set_p4d()/set_pgd() continue to emit the > barriers unconditionally. > > This is all very confusing to the casual observer; surely the rules > should be invariant to the level? Let's change this so that every level > consistently emits the barriers only when setting valid, non-user > entries (both table and leaf). > > It seems obvious that if it is ok to elide barriers all but valid kernel > mappings at pte level, it must also be ok to do this for leaf entries at > other levels: If setting an entry to invalid, a tlb maintenance > operation must surely follow to synchronise the TLB and this contains > the required barriers. If setting a valid user mapping, the previous > mapping must have been invalid and there must have been a TLB > maintenance operation (complete with barriers) to honour > break-before-make. So the worst that can happen is we take an extra > fault (which will imply the DSB + ISB) and conclude that there is > nothing to do. These are the arguments for doing this optimization at > pte level and they also apply to leaf mappings at other levels. > > For table entries, the same arguments hold: If unsetting a table entry, > a TLB is required and this will emit the required barriers. If setting a s/TLB/TLB maintenance/ > table entry, the previous value must have been invalid and the table > walker must already be able to observe that. Additionally the contents > of the pgtable being pointed to in the newly set entry must be visible > before the entry is written and this is enforced via smp_wmb() (dmb) in > the pgtable allocation functions and in __split_huge_pmd_locked(). But > this last part could never have been enforced by the barriers in > set_pXd() because they occur after updating the entry. So ultimately, > the wost that can happen by eliding these barriers for user table s/wost/worst/ - Kevin > entries is an extra fault. > > [...]