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Peter Anvin" , Andrew Morton , zhengqi.arch@bytedance.com, "open list:MEMORY MANAGEMENT" Date: Mon, 30 Dec 2024 13:27:40 -0500 In-Reply-To: <40C8627F-0B0B-4F19-8FF8-5D852A5F9F0F@gmail.com> References: <20241230175550.4046587-1-riel@surriel.com> <20241230175550.4046587-12-riel@surriel.com> <40C8627F-0B0B-4F19-8FF8-5D852A5F9F0F@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.54.1 (3.54.1-1.fc41) MIME-Version: 1.0 X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: 8BB0C40015 X-Rspam-User: X-Stat-Signature: k8ctdo9jykkjcsoafjbcxt5wrf6r4y3k X-HE-Tag: 1735583242-918019 X-HE-Meta: U2FsdGVkX19jILX7kXm2dC8iYJ4gN0jqTknxE9e4det58ck1G5T+MyXWKHj6AKsFt+XUeQRq/eIJiCrHGk18QWIgOx5v3edaaHtT7M0hepicGpelIG5AgwxkKAQr51WbCLYgBS320y16xpPiWCAlG+d0/SM7Lft8/y3wDUuCC8dyVWAroIuZVic2HiCmbZhokVBGcqDythAE+25Xu3C74mo21vI8FNcdsvYicvsnirpdDBy9nd0rXGXwnbf8FWvBFGR+k1qhEtAYBIEIIqEVJ0+oN+QeYerS6zn4IH4wPAHz57Vg9y03vMW3QIUOA1KSd2VPCAyRR98z3ehs8dem/WoJpc5hkPV0+fabVMe3Wm7Zewf+znk0Th4WdvlFptPlpLK4bp2vOGZk/yVBi175AMkhaEgco3rJ8HoQDSs0MgnJnX9qZznuIFEAh1+DIDT+fKHqqyipuipmQ6MtPX5iWcYCWb6fxXqr4G4at8k8onFBVNIC86WT3Rn8dfhysQZ16Pkb/e4d8lDtOSAFSHD51M8K+fA0lLo8DuMgSH4VAZD8pTEF3TtZsG3sN1RUxP45MGx5pOSvwcBBsn86M2YUWsHyfqPS+nqCelvqMPl6w0oHMCCsexe2L1adPmb8+V1F2Az/srfhjljHtbaMm/c3UhaObdOE4WOU1preF6JGDLjl+kXTRD3b1/6V9yQ/SQBHXjFlO2UFN+Ud9EwLTVz1LWTNdI0lcITpsJL9+tErMtnAc29ZoXhwgVcTi8ddjv1KsP1QsamuoWpM5jbF3TTQKonOiYuczMa7Z9lWQcyznoP+1GQXkXDPUEr92LWn8n3Wyg+bxVtdDu+YiZmFVttz5fmeZZve/mBoT3xEAyZl+uBN63ClsJd0hlkAC8vlJrYc4Ub3t+PHQi5WQOLmC0jxx0FW9FUniur+4Y4GIyVEcFagI2eO34dJfW8onvcHZIWArZwlc4UARjAI09Rz+tn 52ac51Gv KoG4VDTUr9hi0676/+S7UuLHXhC9bEW1StHlZMfBeBKvC4bm+9UmtynlA3mpdD9SnZ3+cmeAC5Yct7Oky3mCgU2Vp5NF7Gmo9fHYSQ6lj01V/WSbcEf2rM9uEeJPT7s63ngWg/eKhtZ7xKnEFGMRWYa2suX3XRIRgXpOtogdlYAFpJ8OybOnzNdwTqPzQaewVX3qYbgvBOP+qKReAuRBAdw0WhkAelXik24Eq5SmEdUqWuHdjUEBcQKRMbtRUCUKIPX25HCMvmCPyO5XbYC6fmjws+Zpl50o8ts75RtTBV0w2BKpNtLQynzDjNb1awLniNyvO9iNroG//7RKZnYpqU4NwC7nWjj36DEEe8xTAwi4UWr1cG8jTB2sqpp8EqxrjwWW60AxHUsgcfks= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Mon, 2024-12-30 at 20:25 +0200, Nadav Amit wrote: >=20 > > On 30 Dec 2024, at 19:53, Rik van Riel wrote: > >=20 > > --- a/arch/x86/kernel/cpu/amd.c > > +++ b/arch/x86/kernel/cpu/amd.c > > @@ -1143,6 +1143,14 @@ static void cpu_detect_tlb_amd(struct > > cpuinfo_x86 *c) > >=20 > > /* Max number of pages INVLPGB can invalidate in one shot > > */ > > invlpgb_count_max =3D (edx & 0xffff) + 1; > > + > > + /* If supported, enable translation cache extensions (TCE) > > */ > > + cpuid(0x80000001, &eax, &ebx, &ecx, &edx); > > + if (ecx & BIT(17)) { > > + u64 msr =3D native_read_msr(MSR_EFER);; > > + msr |=3D BIT(15); > > + wrmsrl(MSR_EFER, msr); > > + } > > } >=20 > Sorry for the gradual/delayed feedback. >=20 > Is it possible to avoid the BIT(x) and just add the bits to=20 > arch/x86/include/asm/msr-index.h like EFER_FFXSR ? >=20 Of course! I'd be happy to send that either as part of the next version of the patch series, or as a separate cleanup patch later. Whatever is more convenient for the x86 maintainers. --=20 All Rights Reversed.