From: Xi Ruoyao <xry111@xry111.site>
To: Huacai Chen <chenhuacai@kernel.org>, WANG Xuerui <kernel@xen0n.name>
Cc: Eric Biederman <ebiederm@xmission.com>,
Kees Cook <keescook@chromium.org>,
Tiezhu Yang <yangtiezhu@loongson.cn>,
Jinyang He <hejinyang@loongson.cn>,
loongarch@lists.linux.dev, linux-mm@kvack.org,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH v2] LoongArch: Fix and simplify fcsr initialization on execve
Date: Tue, 02 Jan 2024 18:25:54 +0800 [thread overview]
Message-ID: <f6e0b3a0e08a8100fa5dc9345af8582ff664321c.camel@xry111.site> (raw)
In-Reply-To: <20240102101711.10872-2-xry111@xry111.site>
On Tue, 2024-01-02 at 18:17 +0800, Xi Ruoyao wrote:
> The only other architecture setting FCSR in SET_PERSONALITY2 is MIPS.
> They do this for supporting different FP flavors (NaN encodings etc).
> which do not exist on LoongArch. I'm not sure how MIPS evades the issue
> (or maybe it's just buggy too) but I'll investigate it later.
Phew. I just managed to recommission my 3A4000 and I can reproduce the
issue as well with Linux 5.18.1 (the latest kernel release when I
decommissioned it) and CONFIG_PREEMPT=y.
% cat measure.c
#include <fenv.h>
int main() { return fetestexcept(FE_INEXACT); }
% echo $((1./3))
0.33333333333333331
% while ./a.out; do ; done
(stopped in seconds)
I'm building the mainline kernel on the 3A4000 now, will see if the
issue still exists...
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
next prev parent reply other threads:[~2024-01-02 10:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-02 10:17 Xi Ruoyao
2024-01-02 10:25 ` Xi Ruoyao [this message]
2024-01-02 10:48 ` MIPS: fcsr31 may be dirty after execve when kernel preempt is enabled (was: Re: [PATCH v2] LoongArch: Fix and simplify fcsr initialization on execve) Xi Ruoyao
2024-01-02 11:20 ` Huacai Chen
2024-01-02 11:16 ` [PATCH v2] LoongArch: Fix and simplify fcsr initialization on execve Huacai Chen
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