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Wed, 24 Dec 2025 05:40:05 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface MIME-Version: 1.0 X-ThreadId: AQxZfb8dcq5J Date: Wed, 24 Dec 2025 11:39:26 +0100 From: "Arnd Bergmann" To: "Jason Gunthorpe" Cc: "Arnd Bergmann" , linux-mm@kvack.org, "Andrew Morton" , "Andreas Larsson" , "Christophe Leroy" , "Dave Hansen" , "Linus Walleij" , "Matthew Wilcox" , "Richard Weinberger" , "Russell King" , linux-arm-kernel@lists.infradead.org, linux-fsdevel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, x86@kernel.org Message-Id: In-Reply-To: References: <20251219161559.556737-1-arnd@kernel.org> <20251219161559.556737-4-arnd@kernel.org> <20251219171412.GG254720@nvidia.com> <513078d3-976a-4e6d-b311-dcfcfea99238@app.fastmail.com> Subject: Re: [PATCH 3/4] ARM: remove support for highmem on VIVT Content-Type: text/plain Content-Transfer-Encoding: 7bit X-Rspamd-Server: rspam01 X-Rspamd-Queue-Id: 566B74000C X-Stat-Signature: ddjeturdxxk93mfuzoc5mse9nr4k1hez X-Rspam-User: X-HE-Tag: 1766572808-910838 X-HE-Meta: U2FsdGVkX19nM/Quc1UBR57Yl4bdLKFCdZcqU4RmXbUhltZ+1Ds2Ui2Y03Gepqld6XBzTNapbw2QnuLdTfQtC0NGdYhRFYMHHrIAZM9FOxPtYI6gZEBpLZqpoECqENLRHtIJtBRI839DbFSdVvHI9EQ3m8Y2SKM7bgJnjL3FiLimsHXkLF2DWMrcZ5KI+fXUNavmhgzbradTFQ9C+7CzSE3e5Haxquxx+H3gAEpQa2nzWbURtyE3AN0UJXrUaTA8BubaoeoDQeLf6UxLW/5UxF6djL0+Htb5d+8+MOvR0dLyLlZC5t0Am/Ve9Opf9uWpXL9DjYJl4waN0kY+g+F4uoFf17QxLLo6tEv6Xqeaf23bjYLQXA5mceE8eLqLrX21V+hC7Fk8+g66abu4yXCZR+puQTaAJT+AYvIdqHMcS4Zoxny+/bjdulJSN+13LaHYzhYWDlaOnU/CuyvBQBwKx3OqW1EUO+REGNVkVAMD6JZrUrLKSVHw5PE+pDnbi9nT6h/WzC/ClMJmxdzh0QeVuMXa041Wg7oQxc+BCl4AhX5D6J1LCd5NeAkat243i5xOLXGm7RZB11zzm+0mS/y5HxQZNsqC3qQTOtfjtC79sdePn/eienkp6BjFtu8RHaByaUofBWT3bMFCfdg/dm/HqhWADkb3zDjDBkzvEOX2eJNkerofsO4M3Ke8tvo2Vw8LvEbD6hj5ClTF947YO9dMdb54VAmE3X9WLwWevd7Q+byu/uA47Opi/z6Q3mWQbOFFASjysILZsQ5fyGbrRi9zfbmZZtwW3gJZIJdHqHSI2lFpKGjzY+C5Xyg8Qpl0xykboH8h5DFtgPCt1Y/EXANWJKatr/sqg5NTq09dwHcDDTNJj5HnmZ0HPquVTVWF3ZdeVHkBEtcTqbFGaa+zxUkLpvj9zj5IhrjveDMiBzbNtwsSLCIZl8sDoJn6KHeYhMTgX0x7e+IydKdSDQKdely OVzGfi/+ adtOUqbMPemkkp/r/LIwZ8OUaQKxUtGOmbBMzGFSbe5ZzlhnljtAx90xhA7MdhM8fw7v6F2oSlDFUPUHnSUO1w/kE9HdsBUKqth3RmgYdWG81dz58DfTMZnHHVZV4VABbS8TbwYey/MRbWC6aWADvsGRqL0QTmAD/fFQVwmUCoSMULxN5iliNsBxPu5QmaiOKYbaoz17ZAHL8yh4n2zRxmC0iqsiCKQspa1oYar1pR9CcFqkhWyc/JkCL5vW8iu1w9xMGFG1FCA/aV9I= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Wed, Dec 24, 2025, at 03:26, Jason Gunthorpe wrote: > On Fri, Dec 19, 2025 at 09:34:33PM +0100, Arnd Bergmann wrote: >> On Fri, Dec 19, 2025, at 18:14, Jason Gunthorpe wrote: >> > >> > This looks great, but do you think there should be a boot time crash >> > if a VIVT and HIGHMEM are enabled, just incase? >> >> Do you mean in the common code or just for Arm? >> >> We could use the Arm specific cache_is_vivt() macro, but it feels like >> the 'dpends on !CPU_CACHE_VIVT' Kconfig check I added is both >> safer and simpler. > > Okay, so maybe I'm asking if !CPU_CACHE_VIVT then the kernel fails to > boot on vivt systems, maybe it already does? > Yes, in two separate ways: - you can build a kernel for any combination of armv4/v4t/v5 CPUs (all VIVT), or any combination of armv6/v6k/v7/v7ve/v8 CPUs (all VIPT or PIPT), but we already enforce that you cannot mix the two in any way. The two sets are sufficiently different in terms of instruction set, MMU cache and FPU that trying to boot the wrong one probably doesn't even get to the point of printing any output. - If something changed about the assumption above, any Arm kernel still needs to enable support for each individual CPU model that you may want to boot on. Enabling a SoC family will select the CPUs used in that SoC, and enabling a CPU type selects the cache features like CPU_CACHE_VIVT. Attempting to boot on a CPU model that is not enabled in the kernel build makes it fail in setup_arch() with: pr_err("CPU%u: configuration botched (ID %08x), CPU halted\n", smp_processor_id(), midr); while (1) ; Arnd