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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id f14-20020a19ae0e000000b004f4e637db2fsm587260lfc.167.2023.06.09.09.10.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 09 Jun 2023 09:10:41 -0700 (PDT) Message-ID: Date: Fri, 9 Jun 2023 18:10:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH v2 5/12] percpu: Add {raw,this}_cpu_try_cmpxchg() Content-Language: en-US To: Peter Zijlstra References: <20230531132323.587480729@infradead.org> Cc: corbet@lwn.net, will@kernel.org, peterz@infradead.org, boqun.feng@gmail.com, mark.rutland@arm.com, catalin.marinas@arm.com, dennis@kernel.org, tj@kernel.org, cl@linux.com, hca@linux.ibm.com, gor@linux.ibm.com, agordeev@linux.ibm.com, borntraeger@linux.ibm.com, svens@linux.ibm.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, joro@8bytes.org, suravee.suthikulpanit@amd.com, robin.murphy@arm.com, dwmw2@infradead.org, baolu.lu@linux.intel.com, Arnd Bergmann , Herbert Xu , davem@davemloft.net, penberg@kernel.org, rientjes@google.com, iamjoonsoo.kim@lge.com, Andrew Morton , vbabka@suse.cz, roman.gushchin@linux.dev, 42.hyeyoo@gmail.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, linux-s390@vger.kernel.org, iommu@lists.linux.dev, linux-arch@vger.kernel.org, linux-crypto@vger.kernel.org, sfr@canb.auug.org.au, mpe@ellerman.id.au, James.Bottomley@hansenpartnership.com, deller@gmx.de, linux-parisc@vger.kernel.org, Nathan Chancellor , llvm@lists.linux.dev From: Konrad Dybcio In-Reply-To: <20230531132323.587480729@infradead.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 18B8C8001F X-Stat-Signature: 4mgpbr6mbb3gxr84kfqjk8wc94m38twx X-HE-Tag: 1686327043-276459 X-HE-Meta: U2FsdGVkX189q/aDX6n9Lq/FBHFHmvid7aytLMiPx49S2b4gGO/PtAqJ5d11Bn8La2ZjR/woCl0nkP99ST+dV94R0JrRiIjx9ygWZnoH+f5DHe+FyRe59nIiDJCJpc2YmtOqXTN+YZLpn33eE+kSQFH7vvgvjwDk+HaSK2nGpjpo6mObiP2f3AF8p5m9y6araPoa96R8Ear5JYmETSx2ujTtofHQ0Vs+wSbvk+DtsZ9qAnOjLdt8IUV4UjvAqiI2w8Glh5uNCDuj4CIPQ1iq/xHk8hprU/VqR1rZSpApVqf46WYyVFVTHpht1y1IiX33OqLGkEF3170R2Q+pnTMM81N0TLaBP4TiS03CBYJ3fSzt80yRr/bYWldpKP3A+jNZ0B2fwwGM57xRA3eVWcz7Ynh2FssnN4NpEoc9HdBrGr0V5uGuHcQKSf6mnqnve7VN4TxO/11lKehrv/66hdk/fRUEveJOEGG3Clabp1Wa2hsNgvASPIVtZHyoYI3Z2ps9uwmlJ3XlZZgfHLLIrT27IcXbCVtrmNAvTwRiWX4RyCd3Wu1ApdVPQZQD4DddTHjGDiyCDgGjedouNUgrdCLmyUYddHsGQZCuM0YoHBg13PVoIzTXyNZVhQ5xUkvoVZWylN/byvsjrIL1s0KX2uxvcn/FHM0/4ZFJ+2tnPpDwGR/g6Px1MJJbXw2q+z6wKB9AY+deKHg5jqkujcC+JPVsZ/6V9lsxrdaWZBS21/2+EiGOqt00jWLKoxfIOnJr9Vlr05c/Uh6UjjMnRTNKKBOuc6+kOLDGNQgQ4pRcvsZJH9SLK7ZnQ4Le5bcNkfzmjBRrIalPrmHnVugBHbZia7J+SgFYV3JDUy2cyBxtFDDAfOBsDkHZ/9dUGJyQm8z7mkti7pcEEMze1NOLZl2YxE3xA96/p8gQg2Gvl7wtEydpULQQfp1iU7rGDKP1ILyzgH4yQofq1gwJO5CNxM5AIcm OB/Wit+d IBzk8z5t8VsG+lPJeytRA5K0j67gDvmtqyi53rOm6SzZ87ec51FS7n6ZBU20spBsR1Txfahx/7pxyRqnxaWiKqLbrWSr8KLjCpj+177SqaW1IvNii5ic/9TNuRhvYCwYJ8Oo8mM1lZAQMOu2/5vXW4Ig9aFWN6JppfgM5Z4vos7uZ9C2Dbts25Ezm4UkOZNlsa9uXWudxcYfloSMoDJjcAovj62x9pLW5uy5Vi7wfCAb+5nVyuMmzXp3pB4G8yfdPokNiBkC1bs6ZLnX9hI9d9IChrhFFyhsbDvohjBXD5/qfIxuSli/UCKl2GxOh4QEQyugLUMhteMQi2aLtBE4neJkS0BwAWwK0GPXgwXlxSrRCuXt3ZSjmXwH8p+lpPpREr02tZkL1ycDp3ptEijf2+Nd/ke1cS5qPoceiAmRNdP4KDm9P4+z3WwmlVe25kIU8D86IbsuuabRp0T85vivP4lzVpSaX38YTLFwJTfyASghOSJOJ9N5AZV2A19oCCNoQd4L0kLgSNmwNqj4= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 31.05.2023 15:08, Peter Zijlstra wrote: > Add the try_cmpxchg() form to the per-cpu ops. > > Signed-off-by: Peter Zijlstra (Intel) > --- +CC Nathan, llvm list Hi all, this patch seems to break booting on Qualcomm ARM64 platforms when compiled with clang (GCC works fine) for some reason..: next-20230605 - works next-20230606 - doesn't grev -m 1 dc4e51fd9846 on next-20230606 - works again b4 shazam -P 1-4 - still works b4 shazam -P 5 - breaks Confirmed on at least Qualcomm QCM2290, SM8250. Checking the serial console, it hits a BUG_ON: [ 0.000000] ------------[ cut here ]------------ [ 0.000000] kernel BUG at mm/vmalloc.c:1638! [ 0.000000] Internal error: Oops - BUG: 00000000f2000800 [#1] SMP [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted [snip] [ 0.000000] Hardware name: Qualcomm Technologies, Inc. Robotics RB1 (DT) [ 0.000000] pstate: 000000c5 (nzcv daIF -PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 0.000000] pc : alloc_vmap_area+0xafc/0xb08 [ 0.000000] lr : alloc_vmap_area+0x9e4/0xb08 [ 0.000000] sp : ffffa50137f53c20 [ 0.000000] x29: ffffa50137f53c60 x28: ffffa50137f30c18 x27: 0000000000000000 [ 0.000000] x26: 0000000000007fff x25: ffff800080000000 x24: 000000000000cfff [ 0.000000] x23: ffffffffffff8000 x22: ffffa50137fef970 x21: fffffbfff0000000 [ 0.000000] x20: ffff022982003208 x19: ffff0229820031f8 x18: ffffa50137f64f70 [ 0.000000] x17: ffffa50137fef980 x16: ffffa501375e6d08 x15: 0000000000000001 [ 0.000000] x14: ffffa5013831e1a0 x13: ffffa50137f30c18 x12: 0000000000402dc2 [ 0.000000] x11: 0000000000000000 x10: ffff022982003018 x9 : ffffa5013831e188 [ 0.000000] x8 : ffffcb55ff003228 x7 : 0000000000000000 x6 : 0000000000000048 [ 0.000000] x5 : 0000000000000000 x4 : ffffa50137f53bd0 x3 : ffffa50136490000 [ 0.000000] x2 : 0000000000000001 x1 : ffffa5013831e190 x0 : ffff022982003208 [ 0.000000] Call trace: [ 0.000000] alloc_vmap_area+0xafc/0xb08 [ 0.000000] __get_vm_area_node+0x108/0x1e8 [ 0.000000] __vmalloc_node_range+0x1fc/0x728 [ 0.000000] __vmalloc_node+0x5c/0x70 [ 0.000000] init_IRQ+0x90/0x11c [ 0.000000] start_kernel+0x1ac/0x3bc [ 0.000000] __primary_switched+0xc4/0xcc [ 0.000000] Code: f000e300 91062000 943bd9ba 17ffff8f (d4210000) [ 0.000000] ---[ end trace 0000000000000000 ]--- [ 0.000000] Kernel panic - not syncing: Attempted to kill the idle task! Compiled with clang 15.0.7 from Arch repos, with make ARCH=arm64 LLVM=1 Konrad > include/asm-generic/percpu.h | 113 +++++++++++++++++++++++++++++++++++++++++-- > include/linux/percpu-defs.h | 19 +++++++ > 2 files changed, 128 insertions(+), 4 deletions(-) > > --- a/include/asm-generic/percpu.h > +++ b/include/asm-generic/percpu.h > @@ -89,16 +89,37 @@ do { \ > __ret; \ > }) > > -#define raw_cpu_generic_cmpxchg(pcp, oval, nval) \ > +#define __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, _cmpxchg) \ > +({ \ > + typeof(pcp) __val, __old = *(ovalp); \ > + __val = _cmpxchg(pcp, __old, nval); \ > + if (__val != __old) \ > + *(ovalp) = __val; \ > + __val == __old; \ > +}) > + > +#define raw_cpu_generic_try_cmpxchg(pcp, ovalp, nval) \ > ({ \ > typeof(pcp) *__p = raw_cpu_ptr(&(pcp)); \ > - typeof(pcp) __ret; \ > - __ret = *__p; \ > - if (__ret == (oval)) \ > + typeof(pcp) __val = *__p, __old = *(ovalp); \ > + bool __ret; \ > + if (__val == __old) { \ > *__p = nval; \ > + __ret = true; \ > + } else { \ > + *(ovalp) = __val; \ > + __ret = false; \ > + } \ > __ret; \ > }) > > +#define raw_cpu_generic_cmpxchg(pcp, oval, nval) \ > +({ \ > + typeof(pcp) __old = (oval); \ > + raw_cpu_generic_try_cmpxchg(pcp, &__old, nval); \ > + __old; \ > +}) > + > #define raw_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ > ({ \ > typeof(pcp1) *__p1 = raw_cpu_ptr(&(pcp1)); \ > @@ -170,6 +191,16 @@ do { \ > __ret; \ > }) > > +#define this_cpu_generic_try_cmpxchg(pcp, ovalp, nval) \ > +({ \ > + bool __ret; \ > + unsigned long __flags; \ > + raw_local_irq_save(__flags); \ > + __ret = raw_cpu_generic_try_cmpxchg(pcp, ovalp, nval); \ > + raw_local_irq_restore(__flags); \ > + __ret; \ > +}) > + > #define this_cpu_generic_cmpxchg(pcp, oval, nval) \ > ({ \ > typeof(pcp) __ret; \ > @@ -282,6 +313,43 @@ do { \ > #define raw_cpu_xchg_8(pcp, nval) raw_cpu_generic_xchg(pcp, nval) > #endif > > +#ifndef raw_cpu_try_cmpxchg_1 > +#ifdef raw_cpu_cmpxchg_1 > +#define raw_cpu_try_cmpxchg_1(pcp, ovalp, nval) \ > + __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, raw_cpu_cmpxchg_1) > +#else > +#define raw_cpu_try_cmpxchg_1(pcp, ovalp, nval) \ > + raw_cpu_generic_try_cmpxchg(pcp, ovalp, nval) > +#endif > +#endif > +#ifndef raw_cpu_try_cmpxchg_2 > +#ifdef raw_cpu_cmpxchg_2 > +#define raw_cpu_try_cmpxchg_2(pcp, ovalp, nval) \ > + __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, raw_cpu_cmpxchg_2) > +#else > +#define raw_cpu_try_cmpxchg_2(pcp, ovalp, nval) \ > + raw_cpu_generic_try_cmpxchg(pcp, ovalp, nval) > +#endif > +#endif > +#ifndef raw_cpu_try_cmpxchg_4 > +#ifdef raw_cpu_cmpxchg_4 > +#define raw_cpu_try_cmpxchg_4(pcp, ovalp, nval) \ > + __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, raw_cpu_cmpxchg_4) > +#else > +#define raw_cpu_try_cmpxchg_4(pcp, ovalp, nval) \ > + raw_cpu_generic_try_cmpxchg(pcp, ovalp, nval) > +#endif > +#endif > +#ifndef raw_cpu_try_cmpxchg_8 > +#ifdef raw_cpu_cmpxchg_8 > +#define raw_cpu_try_cmpxchg_8(pcp, ovalp, nval) \ > + __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, raw_cpu_cmpxchg_8) > +#else > +#define raw_cpu_try_cmpxchg_8(pcp, ovalp, nval) \ > + raw_cpu_generic_try_cmpxchg(pcp, ovalp, nval) > +#endif > +#endif > + > #ifndef raw_cpu_cmpxchg_1 > #define raw_cpu_cmpxchg_1(pcp, oval, nval) \ > raw_cpu_generic_cmpxchg(pcp, oval, nval) > @@ -407,6 +475,43 @@ do { \ > #define this_cpu_xchg_8(pcp, nval) this_cpu_generic_xchg(pcp, nval) > #endif > > +#ifndef this_cpu_try_cmpxchg_1 > +#ifdef this_cpu_cmpxchg_1 > +#define this_cpu_try_cmpxchg_1(pcp, ovalp, nval) \ > + __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, this_cpu_cmpxchg_1) > +#else > +#define this_cpu_try_cmpxchg_1(pcp, ovalp, nval) \ > + this_cpu_generic_try_cmpxchg(pcp, ovalp, nval) > +#endif > +#endif > +#ifndef this_cpu_try_cmpxchg_2 > +#ifdef this_cpu_cmpxchg_2 > +#define this_cpu_try_cmpxchg_2(pcp, ovalp, nval) \ > + __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, this_cpu_cmpxchg_2) > +#else > +#define this_cpu_try_cmpxchg_2(pcp, ovalp, nval) \ > + this_cpu_generic_try_cmpxchg(pcp, ovalp, nval) > +#endif > +#endif > +#ifndef this_cpu_try_cmpxchg_4 > +#ifdef this_cpu_cmpxchg_4 > +#define this_cpu_try_cmpxchg_4(pcp, ovalp, nval) \ > + __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, this_cpu_cmpxchg_4) > +#else > +#define this_cpu_try_cmpxchg_4(pcp, ovalp, nval) \ > + this_cpu_generic_try_cmpxchg(pcp, ovalp, nval) > +#endif > +#endif > +#ifndef this_cpu_try_cmpxchg_8 > +#ifdef this_cpu_cmpxchg_8 > +#define this_cpu_try_cmpxchg_8(pcp, ovalp, nval) \ > + __cpu_fallback_try_cmpxchg(pcp, ovalp, nval, this_cpu_cmpxchg_8) > +#else > +#define this_cpu_try_cmpxchg_8(pcp, ovalp, nval) \ > + this_cpu_generic_try_cmpxchg(pcp, ovalp, nval) > +#endif > +#endif > + > #ifndef this_cpu_cmpxchg_1 > #define this_cpu_cmpxchg_1(pcp, oval, nval) \ > this_cpu_generic_cmpxchg(pcp, oval, nval) > --- a/include/linux/percpu-defs.h > +++ b/include/linux/percpu-defs.h > @@ -343,6 +343,21 @@ static __always_inline void __this_cpu_p > pscr2_ret__; \ > }) > > +#define __pcpu_size_call_return2bool(stem, variable, ...) \ > +({ \ > + bool pscr2_ret__; \ > + __verify_pcpu_ptr(&(variable)); \ > + switch(sizeof(variable)) { \ > + case 1: pscr2_ret__ = stem##1(variable, __VA_ARGS__); break; \ > + case 2: pscr2_ret__ = stem##2(variable, __VA_ARGS__); break; \ > + case 4: pscr2_ret__ = stem##4(variable, __VA_ARGS__); break; \ > + case 8: pscr2_ret__ = stem##8(variable, __VA_ARGS__); break; \ > + default: \ > + __bad_size_call_parameter(); break; \ > + } \ > + pscr2_ret__; \ > +}) > + > /* > * Special handling for cmpxchg_double. cmpxchg_double is passed two > * percpu variables. The first has to be aligned to a double word > @@ -426,6 +441,8 @@ do { \ > #define raw_cpu_xchg(pcp, nval) __pcpu_size_call_return2(raw_cpu_xchg_, pcp, nval) > #define raw_cpu_cmpxchg(pcp, oval, nval) \ > __pcpu_size_call_return2(raw_cpu_cmpxchg_, pcp, oval, nval) > +#define raw_cpu_try_cmpxchg(pcp, ovalp, nval) \ > + __pcpu_size_call_return2bool(raw_cpu_try_cmpxchg_, pcp, ovalp, nval) > #define raw_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ > __pcpu_double_call_return_bool(raw_cpu_cmpxchg_double_, pcp1, pcp2, oval1, oval2, nval1, nval2) > > @@ -513,6 +530,8 @@ do { \ > #define this_cpu_xchg(pcp, nval) __pcpu_size_call_return2(this_cpu_xchg_, pcp, nval) > #define this_cpu_cmpxchg(pcp, oval, nval) \ > __pcpu_size_call_return2(this_cpu_cmpxchg_, pcp, oval, nval) > +#define this_cpu_try_cmpxchg(pcp, ovalp, nval) \ > + __pcpu_size_call_return2bool(this_cpu_try_cmpxchg_, pcp, ovalp, nval) > #define this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ > __pcpu_double_call_return_bool(this_cpu_cmpxchg_double_, pcp1, pcp2, oval1, oval2, nval1, nval2) >