From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2428AC433EF for ; Tue, 19 Jul 2022 03:08:21 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 4D3456B0071; Mon, 18 Jul 2022 23:08:21 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 4824D6B0073; Mon, 18 Jul 2022 23:08:21 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 3497F8E0001; Mon, 18 Jul 2022 23:08:21 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0016.hostedemail.com [216.40.44.16]) by kanga.kvack.org (Postfix) with ESMTP id 21CAE6B0071 for ; Mon, 18 Jul 2022 23:08:21 -0400 (EDT) Received: from smtpin03.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay12.hostedemail.com (Postfix) with ESMTP id E955212155B for ; Tue, 19 Jul 2022 03:08:20 +0000 (UTC) X-FDA: 79702365960.03.0453284 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by imf22.hostedemail.com (Postfix) with ESMTP id E9AC9C0075 for ; Tue, 19 Jul 2022 03:08:19 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7625C1042; Mon, 18 Jul 2022 20:08:19 -0700 (PDT) Received: from [10.162.41.8] (unknown [10.162.41.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 60D713F766; Mon, 18 Jul 2022 20:08:13 -0700 (PDT) Message-ID: Date: Tue, 19 Jul 2022 08:38:10 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [RESEND PATCH v3] arm64: enable THP_SWAP for arm64 Content-Language: en-US To: Barry Song <21cnbao@gmail.com>, "Huang, Ying" Cc: Andrew Morton , Catalin Marinas , LAK , Linux-MM , Steven Price , Will Deacon , Andrea Arcangeli , =?UTF-8?B?6YOt5YGl?= , hanchuanhua , Johannes Weiner , Hugh Dickins , LKML , Minchan Kim , Yang Shi , Barry Song , =?UTF-8?B?5byg6K+X5piOKFNpbW9uIFpoYW5nKQ==?= References: <20220718090050.2261-1-21cnbao@gmail.com> <87mtd62apo.fsf@yhuang6-desk2.ccr.corp.intel.com> From: Anshuman Khandual In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1658200100; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gKT8VME58sy6r7sgexeE88RDTWXo2iTF0uHn6DvCYOE=; b=B1Tb4dtcl1xdFgT5MMXa3CG82C5c+40sgdocWF1A89g0E48RMJvBh/+tSi0IvT8UWLjPGM X7ACFYfSNLauSQA0c+hwHAlKJbBYYmmnUAU+PgGvChCrqcNeCszu6geSfpGW39iOckVfi2 oVT1pMO/XDTq3FkbhF/gCvFupeauHks= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1658200100; a=rsa-sha256; cv=none; b=IT5D8MY4N/TaUc8X2hN6FTsHpUtTI2mCYLCdNgNKbnZoWJvoq8lJ083LkB3Eo5VyN+q2Y3 sMNdA1lK5uZFiYhuCH/34wrezuRqNS+GhBnZaPdn/8v7Fh/ANRGIrxFl0gzjcVNs08pd65 VSvS/YcqK4tvltnXDlTGMOVd0h5uwKM= ARC-Authentication-Results: i=1; imf22.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf22.hostedemail.com: domain of anshuman.khandual@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=anshuman.khandual@arm.com X-Rspamd-Queue-Id: E9AC9C0075 Authentication-Results: imf22.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf22.hostedemail.com: domain of anshuman.khandual@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=anshuman.khandual@arm.com X-Rspamd-Server: rspam12 X-Rspam-User: X-Stat-Signature: bchnypxh4izeahw4jpepwxt9cw1j4pfz X-HE-Tag: 1658200099-691282 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 7/19/22 06:53, Barry Song wrote: > On Tue, Jul 19, 2022 at 12:44 PM Huang, Ying wrote: >> >> Barry Song <21cnbao@gmail.com> writes: >> >>> From: Barry Song >>> >>> THP_SWAP has been proven to improve the swap throughput significantly >>> on x86_64 according to commit bd4c82c22c367e ("mm, THP, swap: delay >>> splitting THP after swapped out"). >>> As long as arm64 uses 4K page size, it is quite similar with x86_64 >>> by having 2MB PMD THP. THP_SWAP is architecture-independent, thus, >>> enabling it on arm64 will benefit arm64 as well. >>> A corner case is that MTE has an assumption that only base pages >>> can be swapped. We won't enable THP_SWAP for ARM64 hardware with >>> MTE support until MTE is reworked to coexist with THP_SWAP. >>> >>> A micro-benchmark is written to measure thp swapout throughput as >>> below, >>> >>> unsigned long long tv_to_ms(struct timeval tv) >>> { >>> return tv.tv_sec * 1000 + tv.tv_usec / 1000; >>> } >>> >>> main() >>> { >>> struct timeval tv_b, tv_e;; >>> #define SIZE 400*1024*1024 >>> volatile void *p = mmap(NULL, SIZE, PROT_READ | PROT_WRITE, >>> MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); >>> if (!p) { >>> perror("fail to get memory"); >>> exit(-1); >>> } >>> >>> madvise(p, SIZE, MADV_HUGEPAGE); >>> memset(p, 0x11, SIZE); /* write to get mem */ >>> >>> gettimeofday(&tv_b, NULL); >>> madvise(p, SIZE, MADV_PAGEOUT); >>> gettimeofday(&tv_e, NULL); >>> >>> printf("swp out bandwidth: %ld bytes/ms\n", >>> SIZE/(tv_to_ms(tv_e) - tv_to_ms(tv_b))); >>> } >>> >>> Testing is done on rk3568 64bit quad core processor Quad Core >>> Cortex-A55 platform - ROCK 3A. >>> thp swp throughput w/o patch: 2734bytes/ms (mean of 10 tests) >>> thp swp throughput w/ patch: 3331bytes/ms (mean of 10 tests) >>> >>> Cc: "Huang, Ying" >>> Cc: Minchan Kim >>> Cc: Johannes Weiner >>> Cc: Hugh Dickins >>> Cc: Andrea Arcangeli >>> Cc: Anshuman Khandual >>> Cc: Steven Price >>> Cc: Yang Shi >>> Signed-off-by: Barry Song >>> --- >>> -v3: >>> * refine the commit log; >>> * add a benchmark result; >>> * refine the macro of arch_thp_swp_supported >>> Thanks to the comments of Anshuman, Andrew, Steven >>> >>> arch/arm64/Kconfig | 1 + >>> arch/arm64/include/asm/pgtable.h | 6 ++++++ >>> include/linux/huge_mm.h | 12 ++++++++++++ >>> mm/swap_slots.c | 2 +- >>> 4 files changed, 20 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig >>> index 1652a9800ebe..e1c540e80eec 100644 >>> --- a/arch/arm64/Kconfig >>> +++ b/arch/arm64/Kconfig >>> @@ -101,6 +101,7 @@ config ARM64 >>> select ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP >>> select ARCH_WANT_LD_ORPHAN_WARN >>> select ARCH_WANTS_NO_INSTR >>> + select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES >>> select ARCH_HAS_UBSAN_SANITIZE_ALL >>> select ARM_AMBA >>> select ARM_ARCH_TIMER >>> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h >>> index 0b6632f18364..78d6f6014bfb 100644 >>> --- a/arch/arm64/include/asm/pgtable.h >>> +++ b/arch/arm64/include/asm/pgtable.h >>> @@ -45,6 +45,12 @@ >>> __flush_tlb_range(vma, addr, end, PUD_SIZE, false, 1) >>> #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ >>> >>> +static inline bool arch_thp_swp_supported(void) >>> +{ >>> + return !system_supports_mte(); >>> +} >>> +#define arch_thp_swp_supported arch_thp_swp_supported >>> + >>> /* >>> * Outside of a few very special situations (e.g. hibernation), we always >>> * use broadcast TLB invalidation instructions, therefore a spurious page >>> diff --git a/include/linux/huge_mm.h b/include/linux/huge_mm.h >>> index de29821231c9..4ddaf6ad73ef 100644 >>> --- a/include/linux/huge_mm.h >>> +++ b/include/linux/huge_mm.h >>> @@ -461,4 +461,16 @@ static inline int split_folio_to_list(struct folio *folio, >>> return split_huge_page_to_list(&folio->page, list); >>> } >>> >>> +/* >>> + * archs that select ARCH_WANTS_THP_SWAP but don't support THP_SWP due to >>> + * limitations in the implementation like arm64 MTE can override this to >>> + * false >>> + */ >>> +#ifndef arch_thp_swp_supported >>> +static inline bool arch_thp_swp_supported(void) >>> +{ >>> + return true; >>> +} >> >> How about the following? >> >> static inline bool arch_wants_thp_swap(void) >> { >> return IS_ENABLED(ARCH_WANTS_THP_SWAP); >> } > > This looks good. then i'll need to change arm64 to > > +static inline bool arch_thp_swp_supported(void) > +{ > + return IS_ENABLED(ARCH_WANTS_THP_SWAP) && !system_supports_mte(); > +} Why ? CONFIG_THP_SWAP depends on ARCH_WANTS_THP_SWAP. In folio_alloc_swap(), IS_ENABLED(CONFIG_THP_SWAP) enabled, will also imply ARCH_WANTS_THP_SWAP too is enabled. Hence checking for ARCH_WANTS_THP_SWAP again does not make sense either in the generic fallback stub, or in arm64 platform override. Because without ARCH_WANTS_THP_SWAP enabled, arch_thp_swp_supported() should never be called in the first place. > >> >> Best Regards, >> Huang, Ying >> >>> +#endif >>> + >>> #endif /* _LINUX_HUGE_MM_H */ >>> diff --git a/mm/swap_slots.c b/mm/swap_slots.c >>> index 2a65a89b5b4d..10b94d64cc25 100644 >>> --- a/mm/swap_slots.c >>> +++ b/mm/swap_slots.c >>> @@ -307,7 +307,7 @@ swp_entry_t folio_alloc_swap(struct folio *folio) >>> entry.val = 0; >>> >>> if (folio_test_large(folio)) { >>> - if (IS_ENABLED(CONFIG_THP_SWAP)) >>> + if (IS_ENABLED(CONFIG_THP_SWAP) && arch_thp_swp_supported()) >>> get_swap_pages(1, &entry, folio_nr_pages(folio)); >>> goto out; >>> } > > Thanks > Barry >