From: Christoph Lameter <cl@gentwo.de>
To: Wen Yao <haiwenyao@uniontech.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, dennis@kernel.org, tj@kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-mm@kvack.org
Subject: Re: [PATCH 1/2] riscv: percpu:Add riscv percpu operations
Date: Sun, 30 Oct 2022 14:19:22 +0100 (CET) [thread overview]
Message-ID: <f1b82a9-a88b-50f5-8b49-69e52d7bdaa9@gentwo.de> (raw)
In-Reply-To: <20221026104015.565468-2-haiwenyao@uniontech.com>
On Wed, 26 Oct 2022, Wen Yao wrote:
> This patch use riscv AMO(Atomic Memory Operation) instructions to
> optimise some this_cpu_and this_cpu_or this_cpu_add operations.
> It reuse cmpxchg_local() to impletment this_cpu_cmpxchg macros.
> It reuse xchg_relaxed() to impletment this_cpu_xchg macros.
Are you sure that these changes gives you any benefit vs disabling preempt
or irq offs? I dont know too much about atomics on riscv but it looks like
you are using full atomics. The performance penalty for the use of those
is usually drastic. Often irq/preempt off is better.
Could you run some of the synthetic tests to establish the benefit? F.e.
run the synthetic tests for the slub allcator with and without these
patches.
> + __asm__ __volatile__( \
> + "amo" #asm_op ".w" \
amo = atomic operation?
next prev parent reply other threads:[~2022-10-30 13:19 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-26 10:40 [PATCH 0/2] riscv: Rewrite percpu operations and support cmpxchg-local feature Wen Yao
2022-10-26 10:40 ` [PATCH 1/2] riscv: percpu:Add riscv percpu operations Wen Yao
2022-10-26 18:54 ` Conor Dooley
2022-10-27 0:14 ` kernel test robot
2022-10-27 1:05 ` kernel test robot
2022-10-30 13:19 ` Christoph Lameter [this message]
2022-10-26 10:40 ` [PATCH 2/2] riscv:kconfig:select HAVE_CMPXCHG_LOCAL Wen Yao
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