From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-we0-f170.google.com (mail-we0-f170.google.com [74.125.82.170]) by kanga.kvack.org (Postfix) with ESMTP id 411596B0036 for ; Tue, 8 Apr 2014 11:17:16 -0400 (EDT) Received: by mail-we0-f170.google.com with SMTP id w61so1126637wes.15 for ; Tue, 08 Apr 2014 08:17:11 -0700 (PDT) Received: from mail.zytor.com (terminus.zytor.com. [2001:1868:205::10]) by mx.google.com with ESMTPS id gt3si1063666wib.8.2014.04.08.08.17.08 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 Apr 2014 08:17:09 -0700 (PDT) In-Reply-To: References: <1396883443-11696-1-git-send-email-mgorman@suse.de> <1396883443-11696-3-git-send-email-mgorman@suse.de> <5342C517.2020305@citrix.com> <20140407154935.GD7292@suse.de> <20140407161910.GJ1444@moon> <20140407182854.GH7292@suse.de> <5342FC0E.9080701@zytor.com> <20140407193646.GC23983@moon> <5342FFB0.6010501@zytor.com> <20140407212535.GJ7292@suse.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Subject: Re: [PATCH 2/3] x86: Define _PAGE_NUMA with unused physical address bits PMD and PTE levels From: "H. Peter Anvin" Date: Tue, 08 Apr 2014 08:16:14 -0700 Message-ID: Sender: owner-linux-mm@kvack.org List-ID: To: Steven Noonan , Mel Gorman Cc: Cyrill Gorcunov , David Vrabel , Linus Torvalds , Ingo Molnar , Rik van Riel , Andrew Morton , Peter Zijlstra , Andrea Arcangeli , Linux-MM , Linux-X86 , LKML , Pavel Emelyanov Of course, it would also be preferable if Amazon (or anything else) didn't need Xen PV :( On April 7, 2014 9:04:53 PM PDT, Steven Noonan wrote: >On Mon, Apr 7, 2014 at 2:25 PM, Mel Gorman wrote: >> On Mon, Apr 07, 2014 at 12:42:40PM -0700, H. Peter Anvin wrote: >>> On 04/07/2014 12:36 PM, Cyrill Gorcunov wrote: >>> > On Mon, Apr 07, 2014 at 12:27:10PM -0700, H. Peter Anvin wrote: >>> >> On 04/07/2014 11:28 AM, Mel Gorman wrote: >>> >>> >>> >>> I had considered the soft-dirty tracking usage of the same bit. >I thought I'd >>> >>> be able to swizzle around it or a further worst case of having >soft-dirty and >>> >>> automatic NUMA balancing mutually exclusive. Unfortunately upon >examination >>> >>> it's not obvious how to have both of them share a bit and I >suspect any >>> >>> attempt to will break CRIU. In my current tree, NUMA_BALANCING >cannot be >>> >>> set if MEM_SOFT_DIRTY which is not particularly satisfactory. >Next on the >>> >>> list is examining if _PAGE_BIT_IOMAP can be used. >>> >> >>> >> Didn't we smoke the last user of _PAGE_BIT_IOMAP? >>> > >>> > Seems so, at least for non-kernel pages (not considering this bit >references in >>> > xen code, which i simply don't know but i guess it's used for >kernel pages only). >>> > >>> >>> David Vrabel has a patchset which I presumed would be pulled through >the >>> Xen tree this merge window: >>> >>> [PATCHv5 0/8] x86/xen: fixes for mapping high MMIO regions (and >remove >>> _PAGE_IOMAP) >>> >>> That frees up this bit. >>> >> >> Thanks, I was not aware of that patch. Based on it, I intend to >force >> automatic NUMA balancing to depend on !XEN and see what the reaction >is. If >> support for Xen is really required then it potentially be re-enabled >if/when >> that series is merged assuming they do not need the bit for something >else. >> > >Amazon EC2 does have large memory instance types with NUMA exposed to >the guest (e.g. c3.8xlarge, i2.8xlarge, etc), so it'd be preferable >(to me anyway) if we didn't require !XEN. -- Sent from my mobile phone. Please pardon brevity and lack of formatting. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org