From: Alexandre Ghiti <alex@ghiti.fr>
To: Samuel Holland <samuel.holland@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org,
Andrey Ryabinin <ryabinin.a.a@gmail.com>,
Alexander Potapenko <glider@google.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Dmitry Vyukov <dvyukov@google.com>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
kasan-dev@googlegroups.com
Cc: llvm@lists.linux.dev, Catalin Marinas <catalin.marinas@arm.com>,
linux-kernel@vger.kernel.org, linux-mm@kvack.org,
Alexandre Ghiti <alexghiti@rivosinc.com>,
Will Deacon <will@kernel.org>,
Evgenii Stepanov <eugenis@google.com>,
Andrew Morton <akpm@linux-foundation.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 7/9] riscv: Align the sv39 linear map to 16 GiB
Date: Tue, 5 Nov 2024 14:55:01 +0100 [thread overview]
Message-ID: <e8cf563f-d840-4e33-9ca0-2fa734c9f6c2@ghiti.fr> (raw)
In-Reply-To: <20241022015913.3524425-8-samuel.holland@sifive.com>
On 22/10/2024 03:57, Samuel Holland wrote:
> The KASAN implementation on RISC-V requires the shadow memory for the
> vmemmap and linear map regions to be aligned to a PMD boundary (1 GiB).
PUD boundary
> For KASAN_GENERIC (KASAN_SHADOW_SCALE_SHIFT == 3), this enforces 8 GiB
> alignment for the memory regions themselves. KASAN_SW_TAGS uses 16-byte
> granules (KASAN_SHADOW_SCALE_SHIFT == 4), so now the memory regions must
> be aligned to a 16 GiB boundary.
>
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
> ---
>
> (no changes since v1)
>
> Documentation/arch/riscv/vm-layout.rst | 10 +++++-----
> arch/riscv/include/asm/page.h | 2 +-
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/arch/riscv/vm-layout.rst b/Documentation/arch/riscv/vm-layout.rst
> index eabec99b5852..c0778c421b34 100644
> --- a/Documentation/arch/riscv/vm-layout.rst
> +++ b/Documentation/arch/riscv/vm-layout.rst
> @@ -47,11 +47,11 @@ RISC-V Linux Kernel SV39
> | Kernel-space virtual memory, shared between all processes:
> ____________________________________________________________|___________________________________________________________
> | | | |
> - ffffffc4fea00000 | -236 GB | ffffffc4feffffff | 6 MB | fixmap
> - ffffffc4ff000000 | -236 GB | ffffffc4ffffffff | 16 MB | PCI io
> - ffffffc500000000 | -236 GB | ffffffc5ffffffff | 4 GB | vmemmap
> - ffffffc600000000 | -232 GB | ffffffd5ffffffff | 64 GB | vmalloc/ioremap space
> - ffffffd600000000 | -168 GB | fffffff5ffffffff | 128 GB | direct mapping of all physical memory
> + ffffffc2fea00000 | -244 GB | ffffffc2feffffff | 6 MB | fixmap
> + ffffffc2ff000000 | -244 GB | ffffffc2ffffffff | 16 MB | PCI io
> + ffffffc300000000 | -244 GB | ffffffc3ffffffff | 4 GB | vmemmap
> + ffffffc400000000 | -240 GB | ffffffd3ffffffff | 64 GB | vmalloc/ioremap space
> + ffffffd400000000 | -176 GB | fffffff3ffffffff | 128 GB | direct mapping of all physical memory
> | | | |
> fffffff700000000 | -36 GB | fffffffeffffffff | 32 GB | kasan
> __________________|____________|__________________|_________|____________________________________________________________
> diff --git a/arch/riscv/include/asm/page.h b/arch/riscv/include/asm/page.h
> index 32d308a3355f..6e2f79cf77c5 100644
> --- a/arch/riscv/include/asm/page.h
> +++ b/arch/riscv/include/asm/page.h
> @@ -37,7 +37,7 @@
> * define the PAGE_OFFSET value for SV48 and SV39.
> */
> #define PAGE_OFFSET_L4 _AC(0xffffaf8000000000, UL)
> -#define PAGE_OFFSET_L3 _AC(0xffffffd600000000, UL)
> +#define PAGE_OFFSET_L3 _AC(0xffffffd400000000, UL)
> #else
> #define PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
> #endif /* CONFIG_64BIT */
Other than the nit above (that I think should be fixed though), you can add:
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Thanks,
Alex
next prev parent reply other threads:[~2024-11-05 13:55 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-22 1:57 [PATCH v2 0/9] kasan: RISC-V support for KASAN_SW_TAGS using pointer masking Samuel Holland
2024-10-22 1:57 ` [PATCH v2 1/9] kasan: sw_tags: Use arithmetic shift for shadow computation Samuel Holland
2024-10-23 18:41 ` Andrey Konovalov
2025-02-10 15:22 ` Maciej Wieczor-Retman
2025-02-10 15:52 ` Maciej Wieczor-Retman
2025-02-10 22:57 ` Andrey Konovalov
2025-02-11 8:58 ` Maciej Wieczor-Retman
2025-02-11 13:42 ` Maciej Wieczor-Retman
2025-02-11 18:06 ` Maciej Wieczor-Retman
2025-02-13 1:21 ` Andrey Konovalov
2025-02-13 1:28 ` Andrey Konovalov
2025-02-13 16:20 ` Maciej Wieczor-Retman
2025-02-14 8:20 ` Maciej Wieczor-Retman
2025-02-17 16:13 ` Andrey Konovalov
2025-02-17 18:37 ` Maciej Wieczor-Retman
2025-02-17 19:00 ` Andrey Konovalov
2024-10-22 1:57 ` [PATCH v2 2/9] kasan: sw_tags: Check kasan_flag_enabled at runtime Samuel Holland
2024-10-22 1:57 ` [PATCH v2 3/9] kasan: sw_tags: Support outline stack tag generation Samuel Holland
2024-10-23 18:42 ` Andrey Konovalov
2024-10-22 1:57 ` [PATCH v2 4/9] kasan: sw_tags: Support tag widths less than 8 bits Samuel Holland
2024-10-22 19:30 ` kernel test robot
2024-10-22 19:51 ` kernel test robot
2024-10-22 1:57 ` [PATCH v2 5/9] riscv: mm: Log potential KASAN shadow alias Samuel Holland
2024-11-05 13:44 ` Alexandre Ghiti
2024-10-22 1:57 ` [PATCH v2 6/9] riscv: Do not rely on KASAN to define the memory layout Samuel Holland
2024-11-05 13:47 ` Alexandre Ghiti
2024-10-22 1:57 ` [PATCH v2 7/9] riscv: Align the sv39 linear map to 16 GiB Samuel Holland
2024-11-05 13:55 ` Alexandre Ghiti [this message]
2024-10-22 1:57 ` [PATCH v2 8/9] riscv: Add SBI Firmware Features extension definitions Samuel Holland
2024-10-22 1:57 ` [PATCH v2 9/9] riscv: Implement KASAN_SW_TAGS Samuel Holland
2024-10-23 18:42 ` Andrey Konovalov
2025-05-28 5:38 ` [PATCH v2 0/9] kasan: RISC-V support for KASAN_SW_TAGS using pointer masking JiaJie Ho
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