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From: Alexandre Ghiti <alex@ghiti.fr>
To: Jisheng Zhang <jszhang@kernel.org>, Will Deacon <will@kernel.org>,
	"Aneesh Kumar K . V" <aneesh.kumar@linux.ibm.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Nick Piggin <npiggin@gmail.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Arnd Bergmann <arnd@arndb.de>
Cc: linux-arch@vger.kernel.org, linux-mm@kvack.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH 2/2] riscv: tlb: avoid tlb flushing if fullmm == 1
Date: Sat, 30 Dec 2023 19:26:11 +0100	[thread overview]
Message-ID: <e227f095-0c3d-43c4-8ba3-8ec1b925b929@ghiti.fr> (raw)
In-Reply-To: <20231228084642.1765-3-jszhang@kernel.org>

Hi Jisheng,

On 28/12/2023 09:46, Jisheng Zhang wrote:
> The mmu_gather code sets fullmm=1 when tearing down the entire address
> space for an mm_struct on exit or execve. So if the underlying platform
> supports ASID, the tlb flushing can be avoided because the ASID
> allocator will never re-allocate a dirty ASID.
>
> Use the performance of Process creation in unixbench on T-HEAD TH1520
> platform is improved by about 4%.
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
>   arch/riscv/include/asm/tlb.h | 9 +++++++++
>   1 file changed, 9 insertions(+)
>
> diff --git a/arch/riscv/include/asm/tlb.h b/arch/riscv/include/asm/tlb.h
> index 1eb5682b2af6..35f3c214332e 100644
> --- a/arch/riscv/include/asm/tlb.h
> +++ b/arch/riscv/include/asm/tlb.h
> @@ -12,10 +12,19 @@ static void tlb_flush(struct mmu_gather *tlb);
>   
>   #define tlb_flush tlb_flush
>   #include <asm-generic/tlb.h>
> +#include <asm/mmu_context.h>
>   
>   static inline void tlb_flush(struct mmu_gather *tlb)
>   {
>   #ifdef CONFIG_MMU
> +	/*
> +	 * If ASID is supported, the ASID allocator will either invalidate the
> +	 * ASID or mark it as used. So we can avoid TLB invalidation when
> +	 * pulling down a full mm.
> +	 */


Given the number of bits are limited for the ASID, at some point we'll 
reuse previously allocated ASID so the ASID allocator must make sure to 
invalidate the entries when reusing an ASID: can you point where this is 
done?

Thanks,

Alex


> +	if (static_branch_likely(&use_asid_allocator) && tlb->fullmm)
> +		return;
> +
>   	if (tlb->fullmm || tlb->need_flush_all)
>   		flush_tlb_mm(tlb->mm);
>   	else


  reply	other threads:[~2023-12-30 18:26 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-28  8:46 [PATCH 0/2] riscv: tlb: avoid tlb flushing on exit & execve Jisheng Zhang
2023-12-28  8:46 ` [PATCH 1/2] mm/tlb: fix fullmm semantics Jisheng Zhang
2023-12-30  9:54   ` Nadav Amit
2024-01-02  2:41     ` Jisheng Zhang
2024-01-04 13:26       ` Nadav Amit
2024-01-03 17:50   ` Will Deacon
2024-01-03 17:57     ` Will Deacon
2024-01-03 18:05   ` Catalin Marinas
2024-01-03 20:26     ` Dave Hansen
2023-12-28  8:46 ` [PATCH 2/2] riscv: tlb: avoid tlb flushing if fullmm == 1 Jisheng Zhang
2023-12-30 18:26   ` Alexandre Ghiti [this message]
2024-01-02  3:12     ` Jisheng Zhang
2024-01-04 13:00       ` Alexandre Ghiti

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