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Mon, 17 May 2021 08:40:04 +0000 (GMT) Received: from [9.199.40.240] (unknown [9.199.40.240]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 17 May 2021 08:40:04 +0000 (GMT) Subject: Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument To: Guenter Roeck Cc: linux-mm@kvack.org, akpm@linux-foundation.org, mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org, kaleshsingh@google.com, npiggin@gmail.com, joel@joelfernandes.org, Christophe Leroy References: <20210422054323.150993-1-aneesh.kumar@linux.ibm.com> <20210422054323.150993-6-aneesh.kumar@linux.ibm.com> <20210515163525.GA1106462@roeck-us.net> From: "Aneesh Kumar K.V" Message-ID: Date: Mon, 17 May 2021 14:10:03 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <20210515163525.GA1106462@roeck-us.net> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: CgTrDKX4FOdkim7uHJ4rZNxjRWJUMIsx X-Proofpoint-GUID: 6rJ0y8hBBV9htLm0-zEPoU_R1xL2GUsl X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391,18.0.761 definitions=2021-05-17_03:2021-05-12,2021-05-17 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 mlxscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 clxscore=1011 mlxlogscore=999 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2105170061 X-Rspamd-Queue-Id: 831DF500152D Authentication-Results: imf01.hostedemail.com; dkim=pass header.d=ibm.com header.s=pp1 header.b=ctu4xTAj; dmarc=pass (policy=none) header.from=ibm.com; spf=pass (imf01.hostedemail.com: domain of aneesh.kumar@linux.ibm.com designates 148.163.156.1 as permitted sender) smtp.mailfrom=aneesh.kumar@linux.ibm.com X-Rspamd-Server: rspam03 X-Stat-Signature: 6588bzy9sokuddpxecj8mcieuqefh6ww X-HE-Tag: 1621240826-287100 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 5/15/21 10:05 PM, Guenter Roeck wrote: > On Thu, Apr 22, 2021 at 11:13:19AM +0530, Aneesh Kumar K.V wrote: >> No functional change in this patch >> >> Signed-off-by: Aneesh Kumar K.V >> --- >> .../include/asm/book3s/64/tlbflush-radix.h | 19 +++++++----- >> arch/powerpc/include/asm/book3s/64/tlbflush.h | 23 ++++++++++++--- >> arch/powerpc/mm/book3s64/radix_hugetlbpage.c | 4 +-- >> arch/powerpc/mm/book3s64/radix_tlb.c | 29 +++++++------------ >> 4 files changed, 42 insertions(+), 33 deletions(-) >> >> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h >> index 8b33601cdb9d..171441a43b35 100644 >> --- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h >> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h >> @@ -56,15 +56,18 @@ static inline void radix__flush_all_lpid_guest(unsigned int lpid) >> } >> #endif >> >> -extern void radix__flush_hugetlb_tlb_range(struct vm_area_struct *vma, >> - unsigned long start, unsigned long end); >> -extern void radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start, >> - unsigned long end, int psize); >> -extern void radix__flush_pmd_tlb_range(struct vm_area_struct *vma, >> - unsigned long start, unsigned long end); >> -extern void radix__flush_tlb_range(struct vm_area_struct *vma, unsigned long start, >> +void radix__flush_hugetlb_tlb_range(struct vm_area_struct *vma, >> + unsigned long start, unsigned long end, >> + bool flush_pwc); >> +void radix__flush_pmd_tlb_range(struct vm_area_struct *vma, >> + unsigned long start, unsigned long end, >> + bool flush_pwc); >> +void radix__flush_tlb_pwc_range_psize(struct mm_struct *mm, unsigned long start, >> + unsigned long end, int psize, bool flush_pwc); >> +void radix__flush_tlb_range(struct vm_area_struct *vma, unsigned long start, >> unsigned long end); >> -extern void radix__flush_tlb_kernel_range(unsigned long start, unsigned long end); >> +void radix__flush_tlb_kernel_range(unsigned long start, unsigned long end); >> + >> >> extern void radix__local_flush_tlb_mm(struct mm_struct *mm); >> extern void radix__local_flush_all_mm(struct mm_struct *mm); >> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/powerpc/include/asm/book3s/64/tlbflush.h >> index 215973b4cb26..f9f8a3a264f7 100644 >> --- a/arch/powerpc/include/asm/book3s/64/tlbflush.h >> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h >> @@ -45,13 +45,30 @@ static inline void tlbiel_all_lpid(bool radix) >> hash__tlbiel_all(TLB_INVAL_SCOPE_LPID); >> } >> >> +static inline void flush_pmd_tlb_pwc_range(struct vm_area_struct *vma, > ^^^^ >> + unsigned long start, >> + unsigned long end, >> + bool flush_pwc) >> +{ >> + if (radix_enabled()) >> + return radix__flush_pmd_tlb_range(vma, start, end, flush_pwc); >> + return hash__flush_tlb_range(vma, start, end); > ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > >> +} In this specific case we won't have build errors because, static inline void hash__flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) { But I agree the below is better to read. static inline void flush_pmd_tlb_pwc_range(struct vm_area_struct *vma, unsigned long start, unsigned long end, bool flush_pwc) { if (radix_enabled()) radix__flush_pmd_tlb_range(vma, start, end, flush_pwc); else hash__flush_tlb_range(vma, start, end); return } > >> >> #define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE >> static inline void flush_pmd_tlb_range(struct vm_area_struct *vma, > ^^^^ >> unsigned long start, unsigned long end) >> +{ >> + return flush_pmd_tlb_pwc_range(vma, start, end, false); > ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > > Doesn't that cause build warnings/errors all over the place ? > > Guenter > -aneesh