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Shutemov" , Andrew Morton , linuxppc-dev References: <20210610083549.386085-1-aneesh.kumar@linux.ibm.com> <20210610083549.386085-6-aneesh.kumar@linux.ibm.com> <87wnqy9lru.fsf@linux.ibm.com> From: "Aneesh Kumar K.V" Message-ID: Date: Sun, 13 Jun 2021 16:43:50 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US X-TM-AS-GCONF: 00 X-Proofpoint-GUID: V_yA16TUVe1eyYfdHqOn39OE3IhvknMZ X-Proofpoint-ORIG-GUID: iFlYbDqJufQiVVYWPdU0ky0OjEWGOPKF Content-Transfer-Encoding: 7bit X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391,18.0.761 definitions=2021-06-13_04:2021-06-11,2021-06-13 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 bulkscore=0 adultscore=0 clxscore=1011 spamscore=0 malwarescore=0 priorityscore=1501 mlxscore=0 mlxlogscore=999 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2106130082 X-Rspamd-Server: rspam05 X-Rspamd-Queue-Id: 4B919C005A20 X-Stat-Signature: tqc9r541qbaa118hf6iqd3exfeqkdind Authentication-Results: imf03.hostedemail.com; dkim=pass header.d=ibm.com header.s=pp1 header.b="Kn/h1c0h"; dmarc=pass (policy=none) header.from=ibm.com; spf=pass (imf03.hostedemail.com: domain of aneesh.kumar@linux.ibm.com designates 148.163.156.1 as permitted sender) smtp.mailfrom=aneesh.kumar@linux.ibm.com X-HE-Tag: 1623582919-980689 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 6/13/21 4:20 PM, Matthew Wilcox wrote: > On Sun, Jun 13, 2021 at 02:36:13PM +0530, Aneesh Kumar K.V wrote: >> IIUC the reason why we do have pmd_pgtable() is that pgtable_t type >> is arch dependent. On some architecture it is pte_t * and on the other >> struct page *. The reason being highmem and level 4 page table can >> be located in highmem. > > That is ahistorical. See 2f569afd9ced9ebec9a6eb3dbf6f83429be0a7b4 -- > we have pgtable_t for the benefit of s390's crazy sub-page page table > sizes. That is also true with ppc64. We do sub-page page table size. I was trying to explain why it can't be pte_t * everywhere and why we have it as struct page *. > > Also, please stop numbering page tables upside down. PTEs are first > level, not fourth. > POWER ISA do name it the other way. I also see some pages explaining levels the other way https://www.bottomupcs.com/virtual_memory_linux.xhtml whereas https://en.wikipedia.org/wiki/Intel_5-level_paging#/media/File:Page_Tables_(5_levels).svg I am pretty sure I had commits that explained page table level as I did in this thread. I will switch to your suggestion in further discussions. May be the best solution is to attribute it with more details like level 1 (pte_t *)? -aneesh