From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0345BC46CA2 for ; Tue, 19 Dec 2023 08:30:21 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 9276B8D000F; Tue, 19 Dec 2023 03:30:20 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 8D7868D0005; Tue, 19 Dec 2023 03:30:20 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 7A0BA8D000F; Tue, 19 Dec 2023 03:30:20 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id 6975E8D0005 for ; Tue, 19 Dec 2023 03:30:20 -0500 (EST) Received: from smtpin02.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id 1A9A31401D6 for ; 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imf25.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf25.hostedemail.com: domain of ryan.roberts@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=ryan.roberts@arm.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1702974618; a=rsa-sha256; cv=none; b=5hLkR64wL9nMqzQ5uCR+UC/U0jggHx6kbRgnhpiga28NHV2bimTpbQzhjWSpEIbgmAaC4z LoJ5K/UTgyWmXRrXKo8ZkXZ/pPQfZxF6ZqeK54D+vaRirFCl2ZnwrJ1YEHAWUxyqqCSft8 dzNSv+qqM3V7GkCVIgQHEoMuJFDNl4w= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 334421FB; Tue, 19 Dec 2023 00:31:01 -0800 (PST) Received: from [10.57.75.230] (unknown [10.57.75.230]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 121813F738; Tue, 19 Dec 2023 00:30:12 -0800 (PST) Message-ID: Date: Tue, 19 Dec 2023 08:30:11 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 02/16] mm: Batch-copy PTE ranges during fork() Content-Language: en-GB To: David Hildenbrand , Catalin Marinas , Will Deacon , Ard Biesheuvel , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Andrey Ryabinin , Alexander Potapenko , Andrey Konovalov , Dmitry Vyukov , Vincenzo Frascino , Andrew Morton , Anshuman Khandual , Matthew Wilcox , Yu Zhao , Mark Rutland , Kefeng Wang , John Hubbard , Zi Yan , Barry Song <21cnbao@gmail.com>, Alistair Popple , Yang Shi Cc: linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org References: <20231218105100.172635-1-ryan.roberts@arm.com> <20231218105100.172635-3-ryan.roberts@arm.com> <0bef5423-6eea-446b-8854-980e9c23a948@redhat.com> From: Ryan Roberts In-Reply-To: <0bef5423-6eea-446b-8854-980e9c23a948@redhat.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Server: rspam09 X-Rspamd-Queue-Id: 12FE6A002C X-Stat-Signature: 6g4cfdqrabrsnmmuhjn18z349yirkzb7 X-Rspam-User: X-HE-Tag: 1702974617-426072 X-HE-Meta: U2FsdGVkX19Hot+aFkXoWLQHjiLG5l1wXdF6XBs2gJkfWLRPn2xtlxfnGXcNbMnJykF++RQWJCByLw7O3L+vEzzicAdWoSqCkq7flOs425F7+x5P2iYVL68uQ33hbzCUPKU7X3zZFqQRd7KJQLb72nvQ2hyFq6FJu4FvpDgZ5qz4ge+uzCB7JE4UGpjl+dRQt3l+Iyo6hAm5UlAqN+HH9S4w7Cn67tDoX9JC+5n9lY9PKPyHe1SItpUfuh8pfzTpLO8Yg6A82tZ0d4Y3zyqEIYh0cbs/pdGTOHNa9OwymXaX8WgcpXT4PrC8PQsGRDNpCRJdGdu1f+cCFLXWKy5wEZUrc4TuDLuZy9NZVDtFxk/h/xGNtsOnLQolD2Ba3l8zMyIFbJR1euh18nTmK0l9SMO60UyAvfSHPPifwHKfnTYVmbYyabmgbqvubWwFe0qA7Jlv2Azt0mnMZ8oxUtApzkU6nzVVt2P2FuPLhhVfvMq+/JhRsW91x7ualUxZY9JTLMP2eFDbXh6rmfajNetghx2Ftxp7dCdXxEVT4VNY2pjxHLP6KOiyz0Mb7v2uUvTUFNQ9k/IMM43OYviKIC3ZAlNvjq3dvv1oblYFCLPzTA8UNGEaS5nX+1AmUxZ1doVCe2QtBr/wfu54N6lIeC9gYFkP8C182IW9WrBqlh0QZKmILnQ5/f3Nbf2nIlT2hTBDVrGDrjzq8tXNlokP/93nf26B1hgPJWe/pp0JVmMnZUNe/h25ZYQ301sSuUe0KI7WPe54exPVHw9KaKKg5g2k0LLkfPPkpPKi48B57zN6S7qSghYjds7AKGQWuq6BzuGWMx7FLGKOro8nT8Y2TJU/FWhIHsHAwrAwvb53YySFL2O7gAXeJdo//4rVAWMOFip/HACrTMahYjERfR8G/wKKDQYFtqtLPRr5QNAvgtxumF2fKUSCjgtt8mVHRKJnFdED/svfTZP14hCUCtM3STa npzv9K6F dSZMN2axxyRaTu7eWNa+kI2JRCLBSJKE+yd3CZnMn8aqh09I0W+44mYudESufMPus2cnyKtywVTws4858UyRdTq2FtcUyDL6/PpII6Yl8rLWHKnsXuafYgOq/Mu57en7aDhd4zvkteoZMMl0mV+RoVChkeI9X7SxZgWQbDYegsnB33HYz1R0w8/nlhlzjTaM1ga5oy7wq/z2oyPb2aqTW9tzMr18iFQIXbhp0r7FvfUx55pIubIry7UhrP5llXmSzL+r6vt7RVwkMv0zrs/Fp+Cqqb4eVz/lTS7mFHPsETDH8uqs= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On 18/12/2023 17:47, David Hildenbrand wrote: > On 18.12.23 11:50, Ryan Roberts wrote: >> Convert copy_pte_range() to copy a batch of ptes in one go. A given >> batch is determined by the architecture with the new helper, >> pte_batch_remaining(), and maps a physically contiguous block of memory, >> all belonging to the same folio. A pte batch is then write-protected in >> one go in the parent using the new helper, ptep_set_wrprotects() and is >> set in one go in the child using the new helper, set_ptes_full(). >> >> The primary motivation for this change is to reduce the number of tlb >> maintenance operations that the arm64 backend has to perform during >> fork, as it is about to add transparent support for the "contiguous bit" >> in its ptes. By write-protecting the parent using the new >> ptep_set_wrprotects() (note the 's' at the end) function, the backend >> can avoid having to unfold contig ranges of PTEs, which is expensive, >> when all ptes in the range are being write-protected. Similarly, by >> using set_ptes_full() rather than set_pte_at() to set up ptes in the >> child, the backend does not need to fold a contiguous range once they >> are all populated - they can be initially populated as a contiguous >> range in the first place. >> >> This code is very performance sensitive, and a significant amount of >> effort has been put into not regressing performance for the order-0 >> folio case. By default, pte_batch_remaining() is compile constant 1, >> which enables the compiler to simplify the extra loops that are added >> for batching and produce code that is equivalent (and equally >> performant) as the previous implementation. >> >> This change addresses the core-mm refactoring only and a separate change >> will implement pte_batch_remaining(), ptep_set_wrprotects() and >> set_ptes_full() in the arm64 backend to realize the performance >> improvement as part of the work to enable contpte mappings. >> >> To ensure the arm64 is performant once implemented, this change is very >> careful to only call ptep_get() once per pte batch. >> >> The following microbenchmark results demonstate that there is no >> significant performance change after this patch. Fork is called in a >> tight loop in a process with 1G of populated memory and the time for the >> function to execute is measured. 100 iterations per run, 8 runs >> performed on both Apple M2 (VM) and Ampere Altra (bare metal). Tests >> performed for case where 1G memory is comprised of order-0 folios and >> case where comprised of pte-mapped order-9 folios. Negative is faster, >> positive is slower, compared to baseline upon which the series is based: >> >> | Apple M2 VM   | order-0 (pte-map) | order-9 (pte-map) | >> | fork          |-------------------|-------------------| >> | microbench    |    mean |   stdev |    mean |   stdev | >> |---------------|---------|---------|---------|---------| >> | baseline      |    0.0% |    1.1% |    0.0% |    1.2% | >> | after-change  |   -1.0% |    2.0% |   -0.1% |    1.1% | >> >> | Ampere Altra  | order-0 (pte-map) | order-9 (pte-map) | >> | fork          |-------------------|-------------------| >> | microbench    |    mean |   stdev |    mean |   stdev | >> |---------------|---------|---------|---------|---------| >> | baseline      |    0.0% |    1.0% |    0.0% |    0.1% | >> | after-change  |   -0.1% |    1.2% |   -0.1% |    0.1% | >> >> Tested-by: John Hubbard >> Reviewed-by: Alistair Popple >> Signed-off-by: Ryan Roberts >> --- >>   include/linux/pgtable.h | 80 +++++++++++++++++++++++++++++++++++ >>   mm/memory.c             | 92 ++++++++++++++++++++++++++--------------- >>   2 files changed, 139 insertions(+), 33 deletions(-) >> >> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h >> index af7639c3b0a3..db93fb81465a 100644 >> --- a/include/linux/pgtable.h >> +++ b/include/linux/pgtable.h >> @@ -205,6 +205,27 @@ static inline int pmd_young(pmd_t pmd) >>   #define arch_flush_lazy_mmu_mode()    do {} while (0) >>   #endif >>   +#ifndef pte_batch_remaining >> +/** >> + * pte_batch_remaining - Number of pages from addr to next batch boundary. >> + * @pte: Page table entry for the first page. >> + * @addr: Address of the first page. >> + * @end: Batch ceiling (e.g. end of vma). >> + * >> + * Some architectures (arm64) can efficiently modify a contiguous batch of ptes. >> + * In such cases, this function returns the remaining number of pages to the end >> + * of the current batch, as defined by addr. This can be useful when iterating >> + * over ptes. >> + * >> + * May be overridden by the architecture, else batch size is always 1. >> + */ >> +static inline unsigned int pte_batch_remaining(pte_t pte, unsigned long addr, >> +                        unsigned long end) >> +{ >> +    return 1; >> +} >> +#endif > > It's a shame we now lose the optimization for all other archtiectures. > > Was there no way to have some basic batching mechanism that doesn't require arch > specifics? I tried a bunch of things but ultimately the way I've done it was the only way to reduce the order-0 fork regression to 0. My original v3 posting was costing 5% extra and even my first attempt at an arch-specific version that didn't resolve to a compile-time constant 1 still cost an extra 3%. > > I'd have thought that something very basic would have worked like: > > * Check if PTE is the same when setting the PFN to 0. > * Check that PFN is consecutive > * Check that all PFNs belong to the same folio I haven't tried this exact approach, but I'd be surprised if I can get the regression under 4% with this. Further along the series I spent a lot of time having to fiddle with the arm64 implementation; every conditional and every memory read (even when in cache) was a problem. There is just so little in the inner loop that every instruction matters. (At least on Ampere Altra and Apple M2). Of course if you're willing to pay that 4-5% for order-0 then the benefit to order-9 is around 10% in my measurements. Personally though, I'd prefer to play safe and ensure the common order-0 case doesn't regress, as you previously suggested.