From: Marcel Ziswiler <marcel@ziswiler.com>
To: patchwork-bot+linux-riscv@kernel.org,
Samuel Holland <samuel.holland@sifive.com>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
pjw@kernel.org, akpm@linux-foundation.org, david@redhat.com,
linux-mm@kvack.org, devicetree@vger.kernel.org,
surenb@google.com, linux-kernel@vger.kernel.org,
rppt@kernel.org, mhocko@suse.com, conor@kernel.org,
lorenzo.stoakes@oracle.com, krzk+dt@kernel.org, alex@ghiti.fr,
kernel@esmil.dk, robh+dt@kernel.org, vbabka@suse.cz,
Liam.Howlett@oracle.com, apw@canonical.com,
dwaipayanray1@gmail.com, joe@perches.com, Julia.Lawall@inria.fr,
lukas.bulwahn@gmail.com, nicolas.palix@imag.fr
Subject: Re: [PATCH v3 00/22] riscv: Memory type control for platforms with physical memory aliases
Date: Fri, 27 Feb 2026 11:54:54 +0100 [thread overview]
Message-ID: <d4e44b3659859e8967a1cee7cbbeeeeb399a4536.camel@ziswiler.com> (raw)
In-Reply-To: <176613180179.3684357.1299267450443574866.git-patchwork-notify@kernel.org>
Hi Samuel
On Fri, 2025-12-19 at 08:10 +0000, patchwork-bot+linux-riscv@kernel.org wrote:
> Hello:
>
> This series was applied to riscv/linux.git (fixes)
> by Andrew Morton <akpm@linux-foundation.org>:
Any idea what happened to patches 04-22 as I don't think anything other than patches 01-03 ever got applied
anywhere. Or am I missing anything?
For what it's worth I carried an updated patch set through up to v6.19.4 [1] and latest -next, which at least
on EBC77 seems to work fine.
Thanks!
Cheers
Marcel
[1] https://github.com/riscv/meta-riscv/pull/602
> On Wed, 12 Nov 2025 17:45:13 -0800 you wrote:
> > On some RISC-V platforms, including StarFive JH7100 and ESWIN EIC7700,
> > DRAM is mapped to multiple physical address ranges, with each alias
> > having a different set of statically-determined Physical Memory
> > Attributes (PMAs), such as cacheability. Software can alter the PMAs for
> > a page by selecting a PFN from the corresponding physical address range.
> > On these platforms, this is the only way to allocate noncached memory
> > for use with noncoherent DMA.
> >
> > [...]
>
> Here is the summary with links:
> - [v3,01/22] mm/ptdump: replace READ_ONCE() with standard page table accessors
> https://git.kernel.org/riscv/c/11119b19f62d
> - [v3,02/22] mm: replace READ_ONCE() with standard page table accessors
> https://git.kernel.org/riscv/c/c0efdb373c3a
> - [v3,03/22] mm/dirty: replace READ_ONCE() with pudp_get()
> https://git.kernel.org/riscv/c/b4e53984f240
> - [v3,04/22] perf/events: replace READ_ONCE() with standard page table accessors
> (no matching commit)
> - [v3,05/22] mm: Move the fallback definitions of pXXp_get()
> (no matching commit)
> - [v3,06/22] mm: Always use page table accessor functions
> (no matching commit)
> - [v3,07/22] checkpatch: Warn on page table access without accessors
> (no matching commit)
> - [v3,08/22] mm: Allow page table accessors to be non-idempotent
> (no matching commit)
> - [v3,09/22] riscv: hibernate: Replace open-coded pXXp_get()
> (no matching commit)
> - [v3,10/22] riscv: mm: Always use page table accessor functions
> (no matching commit)
> - [v3,11/22] riscv: mm: Simplify set_p4d() and set_pgd()
> (no matching commit)
> - [v3,12/22] riscv: mm: Deduplicate _PAGE_CHG_MASK definition
> (no matching commit)
> - [v3,13/22] riscv: ptdump: Only show N and MT bits when enabled in the kernel
> (no matching commit)
> - [v3,14/22] riscv: mm: Fix up memory types when writing page tables
> (no matching commit)
> - [v3,15/22] riscv: mm: Expose all page table bits to assembly code
> (no matching commit)
> - [v3,16/22] riscv: alternative: Add an ALTERNATIVE_3 macro
> (no matching commit)
> - [v3,17/22] riscv: alternative: Allow calls with alternate link registers
> (no matching commit)
> - [v3,18/22] riscv: Fix logic for selecting DMA_DIRECT_REMAP
> (no matching commit)
> - [v3,19/22] dt-bindings: riscv: Describe physical memory regions
> (no matching commit)
> - [v3,20/22] riscv: mm: Use physical memory aliases to apply PMAs
> (no matching commit)
> - [v3,21/22] riscv: dts: starfive: jh7100: Use physical memory ranges for DMA
> (no matching commit)
> - [v3,22/22] riscv: dts: eswin: eic7700: Use physical memory ranges for DMA
> (no matching commit)
>
> You are awesome, thank you!
prev parent reply other threads:[~2026-02-27 10:55 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-13 1:45 Samuel Holland
2025-11-13 1:45 ` [PATCH v3 01/22] mm/ptdump: replace READ_ONCE() with standard page table accessors Samuel Holland
2025-11-13 1:45 ` [PATCH v3 02/22] mm: " Samuel Holland
2025-11-13 4:05 ` Dev Jain
2025-11-13 1:45 ` [PATCH v3 03/22] mm/dirty: replace READ_ONCE() with pudp_get() Samuel Holland
2025-11-13 1:45 ` [PATCH v3 04/22] perf/events: replace READ_ONCE() with standard page table accessors Samuel Holland
2025-11-13 19:10 ` David Hildenbrand (Red Hat)
2025-11-13 1:45 ` [PATCH v3 05/22] mm: Move the fallback definitions of pXXp_get() Samuel Holland
2025-11-13 19:11 ` David Hildenbrand (Red Hat)
2025-11-13 1:45 ` [PATCH v3 06/22] mm: Always use page table accessor functions Samuel Holland
2025-11-13 4:53 ` kernel test robot
2025-11-13 5:46 ` kernel test robot
2025-11-26 11:08 ` Christophe Leroy (CS GROUP)
2025-11-26 11:09 ` Ryan Roberts
2025-11-26 12:16 ` David Hildenbrand (Red Hat)
2025-11-26 12:19 ` David Hildenbrand (Red Hat)
2025-11-26 12:27 ` Lorenzo Stoakes
2025-11-26 12:35 ` David Hildenbrand (Red Hat)
2025-11-26 13:03 ` Ryan Roberts
2025-11-26 13:47 ` Wei Yang
2025-11-26 14:22 ` Ryan Roberts
2025-11-26 14:37 ` Lorenzo Stoakes
2025-11-26 14:53 ` David Hildenbrand (Red Hat)
2025-11-26 14:46 ` David Hildenbrand (Red Hat)
2025-11-26 14:52 ` Lorenzo Stoakes
2025-11-26 14:56 ` David Hildenbrand (Red Hat)
2025-11-26 15:08 ` Lorenzo Stoakes
2025-11-26 15:12 ` David Hildenbrand (Red Hat)
2025-11-26 16:07 ` Ryan Roberts
2025-11-26 16:34 ` Ryan Roberts
2025-11-26 20:31 ` David Hildenbrand (Red Hat)
2025-11-27 7:14 ` David Hildenbrand (Red Hat)
2025-11-27 7:31 ` David Hildenbrand (Red Hat)
2025-11-27 15:32 ` Ryan Roberts
2025-11-27 19:39 ` Christophe Leroy (CS GROUP)
2025-11-27 19:44 ` Christophe Leroy (CS GROUP)
2025-11-27 8:26 ` Christophe Leroy (CS GROUP)
2025-11-27 8:35 ` David Hildenbrand (Red Hat)
2025-11-13 1:45 ` [PATCH v3 07/22] checkpatch: Warn on page table access without accessors Samuel Holland
2025-11-13 2:21 ` Joe Perches
2025-11-13 2:36 ` Samuel Holland
2025-11-13 19:17 ` David Hildenbrand (Red Hat)
2025-12-11 0:29 ` Samuel Holland
2025-11-13 1:45 ` [PATCH v3 08/22] mm: Allow page table accessors to be non-idempotent Samuel Holland
2025-11-13 7:19 ` kernel test robot
2025-11-27 16:57 ` Ryan Roberts
2025-11-27 17:47 ` David Hildenbrand (Red Hat)
2025-12-11 0:33 ` Samuel Holland
2025-12-11 13:59 ` Ryan Roberts
2025-12-16 10:29 ` Lorenzo Stoakes
2025-12-16 17:46 ` Ryan Roberts
2025-12-18 17:27 ` Lorenzo Stoakes
2025-12-18 9:49 ` David Hildenbrand (Red Hat)
2025-11-13 1:45 ` [PATCH v3 09/22] riscv: hibernate: Replace open-coded pXXp_get() Samuel Holland
2025-11-13 1:45 ` [PATCH v3 10/22] riscv: mm: Always use page table accessor functions Samuel Holland
2025-11-13 1:45 ` [PATCH v3 11/22] riscv: mm: Simplify set_p4d() and set_pgd() Samuel Holland
2025-11-13 1:45 ` [PATCH v3 12/22] riscv: mm: Deduplicate _PAGE_CHG_MASK definition Samuel Holland
2025-11-13 1:45 ` [PATCH v3 13/22] riscv: ptdump: Only show N and MT bits when enabled in the kernel Samuel Holland
2025-11-13 1:45 ` [PATCH v3 14/22] riscv: mm: Fix up memory types when writing page tables Samuel Holland
2025-11-13 1:45 ` [PATCH v3 15/22] riscv: mm: Expose all page table bits to assembly code Samuel Holland
2025-11-13 1:45 ` [PATCH v3 16/22] riscv: alternative: Add an ALTERNATIVE_3 macro Samuel Holland
2025-11-13 1:45 ` [PATCH v3 17/22] riscv: alternative: Allow calls with alternate link registers Samuel Holland
2025-11-13 1:45 ` [PATCH v3 18/22] riscv: Fix logic for selecting DMA_DIRECT_REMAP Samuel Holland
2025-11-13 1:45 ` [PATCH v3 19/22] dt-bindings: riscv: Describe physical memory regions Samuel Holland
2025-12-04 15:12 ` Rob Herring
2025-11-13 1:45 ` [PATCH v3 20/22] riscv: mm: Use physical memory aliases to apply PMAs Samuel Holland
2025-11-13 1:45 ` [PATCH v3 21/22] riscv: dts: starfive: jh7100: Use physical memory ranges for DMA Samuel Holland
2025-11-13 1:45 ` [PATCH v3 22/22] riscv: dts: eswin: eic7700: " Samuel Holland
2025-11-13 19:13 ` [PATCH v3 00/22] riscv: Memory type control for platforms with physical memory aliases David Hildenbrand (Red Hat)
2025-12-19 8:10 ` patchwork-bot+linux-riscv
2026-02-27 10:54 ` Marcel Ziswiler [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d4e44b3659859e8967a1cee7cbbeeeeb399a4536.camel@ziswiler.com \
--to=marcel@ziswiler.com \
--cc=Julia.Lawall@inria.fr \
--cc=Liam.Howlett@oracle.com \
--cc=akpm@linux-foundation.org \
--cc=alex@ghiti.fr \
--cc=apw@canonical.com \
--cc=conor@kernel.org \
--cc=david@redhat.com \
--cc=devicetree@vger.kernel.org \
--cc=dwaipayanray1@gmail.com \
--cc=joe@perches.com \
--cc=kernel@esmil.dk \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=linux-riscv@lists.infradead.org \
--cc=lorenzo.stoakes@oracle.com \
--cc=lukas.bulwahn@gmail.com \
--cc=mhocko@suse.com \
--cc=nicolas.palix@imag.fr \
--cc=palmer@dabbelt.com \
--cc=patchwork-bot+linux-riscv@kernel.org \
--cc=pjw@kernel.org \
--cc=robh+dt@kernel.org \
--cc=rppt@kernel.org \
--cc=samuel.holland@sifive.com \
--cc=surenb@google.com \
--cc=vbabka@suse.cz \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox