From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id C11DEC433F5 for ; Mon, 21 Mar 2022 06:15:44 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 122D16B0072; Mon, 21 Mar 2022 02:15:44 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 0AD756B0073; Mon, 21 Mar 2022 02:15:44 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id EBEB76B0074; Mon, 21 Mar 2022 02:15:43 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0054.hostedemail.com [216.40.44.54]) by kanga.kvack.org (Postfix) with ESMTP id D8AD56B0072 for ; Mon, 21 Mar 2022 02:15:43 -0400 (EDT) Received: from smtpin28.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay05.hostedemail.com (Postfix) with ESMTP id 814F1182888A1 for ; Mon, 21 Mar 2022 06:15:43 +0000 (UTC) X-FDA: 79267382166.28.561A574 Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by imf12.hostedemail.com (Postfix) with ESMTP id C58984002D for ; Mon, 21 Mar 2022 06:15:41 +0000 (UTC) Received: from kwepemi500002.china.huawei.com (unknown [172.30.72.53]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4KMPTB6yTQzfYr5; Mon, 21 Mar 2022 14:14:06 +0800 (CST) Received: from kwepemm600017.china.huawei.com (7.193.23.234) by kwepemi500002.china.huawei.com (7.221.188.171) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.21; Mon, 21 Mar 2022 14:15:38 +0800 Received: from [10.174.179.234] (10.174.179.234) by kwepemm600017.china.huawei.com (7.193.23.234) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.21; Mon, 21 Mar 2022 14:15:37 +0800 Message-ID: Date: Mon, 21 Mar 2022 14:15:36 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 From: Tong Tiangen Subject: Re: [PATCH -next 3/4] arm64: mm: add support for page table check To: Catalin Marinas CC: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , , "H. Peter Anvin" , Pasha Tatashin , Andrew Morton , "Will Deacon" , Paul Walmsley , "Palmer Dabbelt" , Palmer Dabbelt , Albert Ou , , , , References: <20220317141203.3646253-1-tongtiangen@huawei.com> <20220317141203.3646253-4-tongtiangen@huawei.com> In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed X-Originating-IP: [10.174.179.234] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemm600017.china.huawei.com (7.193.23.234) X-CFilter-Loop: Reflected X-Rspamd-Queue-Id: C58984002D X-Rspam-User: Authentication-Results: imf12.hostedemail.com; dkim=none; spf=pass (imf12.hostedemail.com: domain of tongtiangen@huawei.com designates 45.249.212.187 as permitted sender) smtp.mailfrom=tongtiangen@huawei.com; dmarc=pass (policy=quarantine) header.from=huawei.com X-Stat-Signature: 3pci31ub17tc9r65k48wsj3hyxbzq3re X-Rspamd-Server: rspam07 X-HE-Tag: 1647843341-726538 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: =E5=9C=A8 2022/3/19 1:18, Catalin Marinas =E5=86=99=E9=81=93: > On Fri, Mar 18, 2022 at 11:58:22AM +0800, Tong Tiangen wrote: >> =E5=9C=A8 2022/3/18 3:00, Catalin Marinas =E5=86=99=E9=81=93: >>> On Thu, Mar 17, 2022 at 02:12:02PM +0000, Tong Tiangen wrote: >>>> @@ -628,6 +647,25 @@ static inline unsigned long pmd_page_vaddr(pmd_= t pmd) >>>> #define pud_leaf(pud) pud_sect(pud) >>>> #define pud_valid(pud) pte_valid(pud_pte(pud)) >>>> +#ifdef CONFIG_PAGE_TABLE_CHECK >>>> +static inline bool pte_user_accessible_page(pte_t pte) >>>> +{ >>>> + return (pte_val(pte) & PTE_VALID) && (pte_val(pte) & PTE_USER); >>>> +} > [...] >>> Do we care about PROT_NONE mappings here? They have the valid bit >>> cleared but pte_present() is true. >>> >> >> PTC will not check this special type(PROT_NONE) of page. >=20 > PROT_NONE is just a permission but since we don't have independent read > and write bits in the pte, we implement it as an invalid pte (bit 0 > cleared). The other content of the pte is fine, so pte_pfn() should > still work. PTC could as well check this, I don't think it hurts. You have a point and the logic should be: pte_present(pte) && (pte_user(pte) || pte_user_exec(pte)) >=20 >>>> +static inline bool pmd_user_accessible_page(pmd_t pmd) >>>> +{ >>>> + return pmd_leaf(pmd) && (pmd_val(pmd) & PTE_VALID) && >>>> + (pmd_val(pmd) & PTE_USER); >>>> +} >>> >>> pmd_leaf() implies valid, so you can skip it if that's the aim. >> >> PTC only checks whether the memory block corresponding to the pmd_leaf= type >> can access, for !pmd_leaf, PTC checks at the pte level. So i think thi= s is >> necessary. >=20 > My point is that the (pmd_val(pmd) & PTE_VALID) check is superfluous > since that's covered by pmd_leaf() already. Oh=EF=BC=8Ci got it=EF=BC=8Cyou're right and these will be fixed in v2. Considering all your suggestions, The final logic should be: +#define pte_user(pte) (!!(pte_val(pte) & PTE_USER)) +#define pmd_user(pmd) pte_user(pmd_pte(pmd)) +#define pmd_user_exec(pmd) pte_user_exec(pmd_pte(pmd)) +#define pud_user(pud) pte_user(pud_pte(pud)) +static inline bool pte_user_accessible_page(pte_t pte) +{ + return pte_present(pte) && (pte_user(pte)|| pte_user_exec(pte)); +} +static inline bool pmd_user_accessible_page(pmd_t pmd) +{ + return pmd_present(pmd) && (pmd_user(pmd)|| pmd_user_exec(pmd)); +} +static inline bool pud_user_accessible_page(pud_t pud) +{ + return pud_present(pud) && pud_user(pud); +} >=20