From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78A10C36010 for ; Mon, 7 Apr 2025 15:48:44 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 22FAB6B0008; Mon, 7 Apr 2025 11:48:43 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 1DC196B000A; Mon, 7 Apr 2025 11:48:43 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 0A54F6B000C; Mon, 7 Apr 2025 11:48:43 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0013.hostedemail.com [216.40.44.13]) by kanga.kvack.org (Postfix) with ESMTP id E182D6B0008 for ; Mon, 7 Apr 2025 11:48:42 -0400 (EDT) Received: from smtpin30.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay04.hostedemail.com (Postfix) with ESMTP id 310921A1333 for ; Mon, 7 Apr 2025 15:48:43 +0000 (UTC) X-FDA: 83307680526.30.DB08655 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by imf03.hostedemail.com (Postfix) with ESMTP id 08C5220014 for ; Mon, 7 Apr 2025 15:48:40 +0000 (UTC) Authentication-Results: imf03.hostedemail.com; dkim=none; spf=pass (imf03.hostedemail.com: domain of alex@ghiti.fr designates 217.70.183.199 as permitted sender) smtp.mailfrom=alex@ghiti.fr; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1744040921; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9fVHHJl28vRfc6Zpl1gyifVdfB+VkoKg3L0y//l4rug=; b=zqwHNnOeYJMk2m9NmULwuaKEfWDX9lDBPij5ZKcsjab01HS/MvI4WAhfakTt1jcyFuCO/S fTC2cqkhFfGKflLRqR4TLvMB/QEOrfCC24Bdjs7w7zq8l+ExS48FdWfVlr9AXXFufhbntj J3b/JaGoCEhD9Vg5HpC0fdINTMboHc4= ARC-Authentication-Results: i=1; imf03.hostedemail.com; dkim=none; spf=pass (imf03.hostedemail.com: domain of alex@ghiti.fr designates 217.70.183.199 as permitted sender) smtp.mailfrom=alex@ghiti.fr; dmarc=none ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1744040921; a=rsa-sha256; cv=none; b=cYEUmlB3KCSEs76/GdGLu78e+uva/hbqbfw4YH7M4OMx5Oug4N1dlGrMoHCcrhudyxtPst kE1NsacYKcCQJLAm2if7OH+hp+b7bs57MR5NKb5dLxprlA6VtunqgwUYRpxn/ahNI4jyPY Hll5PUoPJRrtE8DQX8YlgqhVUagidIQ= Received: by mail.gandi.net (Postfix) with ESMTPSA id D79204328B; Mon, 7 Apr 2025 15:48:27 +0000 (UTC) Message-ID: Date: Mon, 7 Apr 2025 17:48:27 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v12 03/28] riscv: zicfiss / zicfilp enumeration Content-Language: en-US To: Deepak Gupta , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Zong Li References: <20250314-v5_user_cfi_series-v12-0-e51202b53138@rivosinc.com> <20250314-v5_user_cfi_series-v12-3-e51202b53138@rivosinc.com> From: Alexandre Ghiti In-Reply-To: <20250314-v5_user_cfi_series-v12-3-e51202b53138@rivosinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgddvtddtheelucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuifetpfffkfdpucggtfgfnhhsuhgsshgtrhhisggvnecuuegrihhlohhuthemuceftddunecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjughrpefkffggfgfuvfevfhfhjggtgfesthejredttddvjeenucfhrhhomheptehlvgigrghnughrvgcuifhhihhtihcuoegrlhgvgiesghhhihhtihdrfhhrqeenucggtffrrghtthgvrhhnpedthfelfeejgeehveegleejleelgfevhfekieffkeeujeetfedvvefhledvgeegieenucfkphepudejiedrudegjedrudeghedrgeegnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehinhgvthepudejiedrudegjedrudeghedrgeegpdhhvghloheplgduledvrdduieekrddurdduheefngdpmhgrihhlfhhrohhmpegrlhgvgiesghhhihhtihdrfhhrpdhnsggprhgtphhtthhopeegledprhgtphhtthhopeguvggsuhhgsehrihhvohhsihhntgdrtghomhdprhgtphhtthhopehtghhlgieslhhinhhuthhrohhnihigrdguvgdprhgtphhtthhopehmihhnghhosehrvgguhhgrthdrtghomhdprhgtphhtthhopegsphesrghlihgvnhekrdguvgdprhgtphhtthhopegurghvvgdrhhgrnhhsvghnsehlihhnuhigrdhinhhtvghlrdgtohhmpdhrtghpthhtohepgiekieeskhgvrhhnvghlrdhorhhgpdhrtghpthhto hephhhpr gesiiihthhorhdrtghomhdprhgtphhtthhopegrkhhpmheslhhinhhugidqfhhouhhnuggrthhiohhnrdhorhhg X-GND-Sasl: alex@ghiti.fr X-Rspamd-Server: rspam11 X-Rspamd-Queue-Id: 08C5220014 X-Stat-Signature: caxpedf5we6xarusepqoakjbr1tkxw5e X-Rspam-User: X-HE-Tag: 1744040920-875946 X-HE-Meta: U2FsdGVkX1/ijkUXwwnMjit2/Wk84a5Kj8q+UkQQeRSKELgQaBYZB9tfjg4FKrlJGWmhVHJPMzoVHVWtBBuf4VCgiC2JchKmdQEbLZHUrN5IuqrNuFrI9IbhzqdghHoHB20/Mft6Ej9PRB9gqihzgu9YdAt5fudygO+nlmS8h/xIZB27n3pvX2j03Rr2HfjOkiAAYur3M/OcdwRPuItQVI8oyAs4MyWyABHid2grCxohz+8OHCavfuJDlTkqZJRDvNv6WpWDJ+uLdbgkFIrJ0SWYZ6tmjNJUPQRNZb+J3CJn83JD3a4wnt3v3mRyx8+IyaF6KSTjcdAgX++DG9M21jSYgkArdE55bWZY7rg63jnD1pAs1bNDnvkMsEtcCl9yBpikCU5vgk0f+401+11ZHxI/MPFBZySXCbNvc3jNdhL5HI524buaXZ+tv6HsCD3dnHzz3FSdXyhJyGfEHMA7dOGZB72yeTP6y9j6HI1z6W9+OGF58RKHkI1ZwwGMp9MHHLgqG/w3MwkBnAN3AtWspbSq5HgYyJtkcwpmsGV9ZxN5U31qqazkjGpN0nNfGpzvgkRb95iWGC2DLFqpKzuqqva2JqLDI7qSU96qMBhLLEb3QGVWUy04N8+Q3RA+nX2sO0ltCddK9fuDD11Ii8jn8OFps9P9XYCOnLfmqcS4VbBUUj7U6Jn925WfOu2nHLKS4fpEYRrHKfA1NXtScNfmKUGzZWULaX5L7IAGl4BEKDmu7InPSkaeMFD09nRVWLigpOjriW8dbhcO8fF4qglAMN+XrrLSUuWnKsmdxkT+tX+wColdrQO8Brk/s2ATUlurFBoSqgwrzD2/po89KsD+hPe8PgKrY1NxIDEWRdKkAUWwb8PrRLHUtXu/FBcPjmN2qduuRjkuNnTBdW/pV4kX9xOPWVMiFD55sC1+yUm5dERaK6UHA+eiSytmIIqCOP7XUTh14Ym7g6r07BoFYFg 1pwB94H2 xeAsuYSDJ5mfC3/rGM2UybjEOeS0DKlcP0KzoifLBHqB0E6QWAaASkn4Mpmx5Ne8AQ4xtgmKp/G+Lrf6DggulcOvtN4nxM8Ufyi81MxWgdsIlP/8StAMc3olRlf03/97GS7IrkRsxpZv96EH6tFNTxbKdO8IcX+Q90K91u/2N3BrrJoDBxLVN/l7MdxxUixVFXXrRy1vRSLY92qRoe3bU+idwhLUZ8wQtsOATBnwX9hF6WTTkco0U0sSZWgH78bw5phAczoz4Nt7LvsxEwFmM9BDe4A== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On 14/03/2025 22:39, Deepak Gupta wrote: > This patch adds support for detecting zicfiss and zicfilp. zicfiss and > zicfilp stands for unprivleged integer spec extension for shadow stack > and branch tracking on indirect branches, respectively. > > This patch looks for zicfiss and zicfilp in device tree and accordinlgy > lights up bit in cpu feature bitmap. Furthermore this patch adds detection > utility functions to return whether shadow stack or landing pads are > supported by cpu. > > Reviewed-by: Zong Li > Signed-off-by: Deepak Gupta > --- > arch/riscv/include/asm/cpufeature.h | 13 +++++++++++++ > arch/riscv/include/asm/hwcap.h | 2 ++ > arch/riscv/include/asm/processor.h | 1 + > arch/riscv/kernel/cpufeature.c | 13 +++++++++++++ > 4 files changed, 29 insertions(+) > > diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h > index 569140d6e639..69007b8100ca 100644 > --- a/arch/riscv/include/asm/cpufeature.h > +++ b/arch/riscv/include/asm/cpufeature.h > @@ -12,6 +12,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -137,4 +138,16 @@ static __always_inline bool riscv_cpu_has_extension_unlikely(int cpu, const unsi > return __riscv_isa_extension_available(hart_isa[cpu].isa, ext); > } > > +static inline bool cpu_supports_shadow_stack(void) > +{ > + return (IS_ENABLED(CONFIG_RISCV_USER_CFI) && > + riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICFISS)); I would use riscv_has_extension_unlikely() instead of the cpu specific variant, that would remove the need for #include . Unless you have a good reason to do that? > +} > + > +static inline bool cpu_supports_indirect_br_lp_instr(void) > +{ > + return (IS_ENABLED(CONFIG_RISCV_USER_CFI) && > + riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICFILP)); > +} > + > #endif > diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h > index 869da082252a..2dc4232bdb3e 100644 > --- a/arch/riscv/include/asm/hwcap.h > +++ b/arch/riscv/include/asm/hwcap.h > @@ -100,6 +100,8 @@ > #define RISCV_ISA_EXT_ZICCRSE 91 > #define RISCV_ISA_EXT_SVADE 92 > #define RISCV_ISA_EXT_SVADU 93 > +#define RISCV_ISA_EXT_ZICFILP 94 > +#define RISCV_ISA_EXT_ZICFISS 95 > > #define RISCV_ISA_EXT_XLINUXENVCFG 127 > > diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h > index 5f56eb9d114a..e3aba3336e63 100644 > --- a/arch/riscv/include/asm/processor.h > +++ b/arch/riscv/include/asm/processor.h > @@ -13,6 +13,7 @@ > #include > > #include > +#include > > #define arch_get_mmap_end(addr, len, flags) \ > ({ \ > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index c6ba750536c3..82065cc55822 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -150,6 +150,15 @@ static int riscv_ext_svadu_validate(const struct riscv_isa_ext_data *data, > return 0; > } > > +static int riscv_cfi_validate(const struct riscv_isa_ext_data *data, > + const unsigned long *isa_bitmap) > +{ > + if (!IS_ENABLED(CONFIG_RISCV_USER_CFI)) > + return -EINVAL; > + > + return 0; > +} > + > static const unsigned int riscv_zk_bundled_exts[] = { > RISCV_ISA_EXT_ZBKB, > RISCV_ISA_EXT_ZBKC, > @@ -333,6 +342,10 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { > __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xlinuxenvcfg_exts, > riscv_ext_zicboz_validate), > __RISCV_ISA_EXT_DATA(ziccrse, RISCV_ISA_EXT_ZICCRSE), > + __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicfilp, RISCV_ISA_EXT_ZICFILP, riscv_xlinuxenvcfg_exts, > + riscv_cfi_validate), > + __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicfiss, RISCV_ISA_EXT_ZICFISS, riscv_xlinuxenvcfg_exts, > + riscv_cfi_validate), > __RISCV_ISA_EXT_DATA(zicntr, RISCV_ISA_EXT_ZICNTR), > __RISCV_ISA_EXT_DATA(zicond, RISCV_ISA_EXT_ZICOND), > __RISCV_ISA_EXT_DATA(zicsr, RISCV_ISA_EXT_ZICSR), > With the above comment fixed, you can add: Reviewed-by: Alexandre Ghiti Thanks, Alex