From: Juergen Gross <jgross@suse.com>
To: "Kirill A. Shutemov" <kirill@shutemov.name>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Michal Hocko <mhocko@kernel.org>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCHv2 08/10] x86/mm: Replace compile-time checks for 5-level with runtime-time
Date: Thu, 27 Jul 2017 10:27:16 +0200 [thread overview]
Message-ID: <c225cead-70e7-86fb-c754-053bbc3e2b7f@suse.com> (raw)
In-Reply-To: <20170726164335.xaajz5ltzhncju26@node.shutemov.name>
On 26/07/17 18:43, Kirill A. Shutemov wrote:
> On Wed, Jul 26, 2017 at 09:28:16AM +0200, Juergen Gross wrote:
>> On 25/07/17 11:05, Kirill A. Shutemov wrote:
>>> On Tue, Jul 18, 2017 at 04:24:06PM +0200, Juergen Gross wrote:
>>>> Xen PV guests will never run with 5-level-paging enabled. So I guess you
>>>> can drop the complete if (IS_ENABLED(CONFIG_X86_5LEVEL)) {} block.
>>>
>>> There is more code to drop from mmu_pv.c.
>>>
>>> But while there, I thought if with boot-time 5-level paging switching we
>>> can allow kernel to compile with XEN_PV and XEN_PVH, so the kernel image
>>> can be used in these XEN modes with 4-level paging.
>>>
>>> Could you check if with the patch below we can boot in XEN_PV and XEN_PVH
>>> modes?
>>
>> We can't. I have used your branch:
>>
>> git://git.kernel.org/pub/scm/linux/kernel/git/kas/linux.git
>> la57/boot-switching/v2
>>
>> with this patch applied on top.
>>
>> Doesn't boot PV guest with X86_5LEVEL configured (very early crash).
>
> Hm. Okay.
>
> Have you tried PVH?
Now I have. Its coming up.
>
>> Doesn't build with X86_5LEVEL not configured:
>>
>> AS arch/x86/kernel/head_64.o
>
> I've fixed the patch and split the patch into two parts: cleanup and
> re-enabling XEN_PV and XEN_PVH for X86_5LEVEL.
>
> There's chance that I screw somthing up in clenaup part. Could you check
> that?
Not sure I'll manage to do this today. Stay tuned...
Juergen
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next prev parent reply other threads:[~2017-07-27 8:27 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-18 14:15 [PATCHv2 00/10] Boot-time switching between 4- and 5-level paging Kirill A. Shutemov
2017-07-18 14:15 ` [PATCHv2 01/10] x86/kasan: Use the same shadow offset for " Kirill A. Shutemov
2017-07-18 14:15 ` [PATCHv2 02/10] x86/xen: Provide pre-built page tables only for XEN_PV and XEN_PVH Kirill A. Shutemov
2017-07-18 14:15 ` [PATCHv2 03/10] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time Kirill A. Shutemov
2017-07-18 14:15 ` [PATCHv2 04/10] x86/mm: Make virtual memory layout movable for CONFIG_X86_5LEVEL Kirill A. Shutemov
2017-07-18 14:15 ` [PATCHv2 05/10] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable Kirill A. Shutemov
2017-07-18 14:15 ` [PATCHv2 06/10] x86/mm: Handle boot-time paging mode switching at early boot Kirill A. Shutemov
2017-07-18 14:15 ` [PATCHv2 07/10] x86/mm: Fold p4d page table layer at runtime Kirill A. Shutemov
2017-07-18 14:15 ` [PATCHv2 08/10] x86/mm: Replace compile-time checks for 5-level with runtime-time Kirill A. Shutemov
2017-07-18 14:24 ` Juergen Gross
2017-07-18 15:16 ` Kirill A. Shutemov
2017-07-25 9:05 ` Kirill A. Shutemov
2017-07-26 7:28 ` Juergen Gross
2017-07-26 16:43 ` Kirill A. Shutemov
2017-07-27 8:27 ` Juergen Gross [this message]
2017-08-01 7:46 ` Juergen Gross
2017-08-01 14:44 ` Kirill A. Shutemov
2017-08-01 17:14 ` Juergen Gross
2017-08-01 19:11 ` Kirill A. Shutemov
2017-08-02 7:44 ` Juergen Gross
2017-08-02 8:17 ` Kirill A. Shutemov
2017-08-02 8:30 ` Juergen Gross
2017-07-18 14:15 ` [PATCHv2 09/10] x86/mm: Allow to boot without la57 if CONFIG_X86_5LEVEL=y Kirill A. Shutemov
2017-07-18 14:15 ` [PATCHv2 10/10] x86/mm: Offset boot-time paging mode switching cost Kirill A. Shutemov
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