From: Rik van Riel <riel@surriel.com>
To: Michael Kelley <mhklinux@outlook.com>, "x86@kernel.org" <x86@kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"bp@alien8.de" <bp@alien8.de>,
"peterz@infradead.org" <peterz@infradead.org>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"zhengqi.arch@bytedance.com" <zhengqi.arch@bytedance.com>,
"nadav.amit@gmail.com" <nadav.amit@gmail.com>,
"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
"kernel-team@meta.com" <kernel-team@meta.com>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
"akpm@linux-foundation.org" <akpm@linux-foundation.org>,
"jannh@google.com" <jannh@google.com>,
"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
Dave Hansen <dave.hansen@intel.com>
Subject: Re: [PATCH v5 03/12] x86/mm: consolidate full flush threshold decision
Date: Fri, 17 Jan 2025 14:32:29 -0500 [thread overview]
Message-ID: <bc7b621deaa75bd6d641fef272e5b045916515e5.camel@surriel.com> (raw)
In-Reply-To: <SN6PR02MB41574BB1004E584168B8D30BD41B2@SN6PR02MB4157.namprd02.prod.outlook.com>
On Fri, 2025-01-17 at 19:23 +0000, Michael Kelley wrote:
> From: riel@surriel.com <riel@surriel.com> Sent: Wednesday, January
> 15, 2025 6:30 PM
> >
> > - info = get_flush_tlb_info(NULL, start, end, 0,
> > false,
> > - TLB_GENERATION_INVALID);
> > + guard(preempt)();
> > +
> > + info = get_flush_tlb_info(NULL, start, end, PAGE_SHIFT,
> > false,
> > + TLB_GENERATION_INVALID);
> >
> > + if (end == TLB_FLUSH_ALL)
>
> This needs to test "info->end", not "end".
>
> In my VM on Hyper-V *without* INVLPGB support, the bug causes
> boot to hang as it tries to individually flush each page in the
> [0, TLB_FLUSH_ALL] range. :-)
Ohhhh, good catch.
I guess on bare metal the automatic tests that run
on every kernel build didn't notice the slower
boot, because it's not as severe of an impact as
in a virtual machine.
--
All Rights Reversed.
next prev parent reply other threads:[~2025-01-17 19:33 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-16 2:30 [PATCH v5 00/12] AMD broadcast TLB invalidation Rik van Riel
2025-01-16 2:30 ` [PATCH v5 01/12] x86/mm: make MMU_GATHER_RCU_TABLE_FREE unconditional Rik van Riel
2025-01-16 2:30 ` [PATCH v5 02/12] x86/mm: remove pv_ops.mmu.tlb_remove_table call Rik van Riel
2025-01-16 2:30 ` [PATCH v5 03/12] x86/mm: consolidate full flush threshold decision Rik van Riel
2025-01-17 19:23 ` Michael Kelley
2025-01-17 19:32 ` Rik van Riel [this message]
2025-01-16 2:30 ` [PATCH v5 04/12] x86/mm: get INVLPGB count max from CPUID Rik van Riel
2025-01-16 2:30 ` [PATCH v5 05/12] x86/mm: add INVLPGB support code Rik van Riel
2025-01-16 2:30 ` [PATCH v5 06/12] x86/mm: use INVLPGB for kernel TLB flushes Rik van Riel
2025-01-16 2:30 ` [PATCH v5 07/12] x86/tlb: use INVLPGB in flush_tlb_all Rik van Riel
2025-01-16 2:30 ` [PATCH v5 08/12] x86/mm: use broadcast TLB flushing for page reclaim TLB flushing Rik van Riel
2025-01-16 2:30 ` [PATCH v5 09/12] x86/mm: enable broadcast TLB invalidation for multi-threaded processes Rik van Riel
2025-01-16 2:30 ` [PATCH v5 10/12] x86,tlb: do targeted broadcast flushing from tlbbatch code Rik van Riel
2025-01-20 9:56 ` Nadav Amit
2025-01-20 14:02 ` Rik van Riel
2025-01-20 14:14 ` Nadav Amit
2025-01-20 16:11 ` Rik van Riel
2025-01-20 17:09 ` Nadav Amit
2025-01-20 17:11 ` Rik van Riel
2025-01-20 17:50 ` Nadav Amit
2025-01-20 17:56 ` Rik van Riel
2025-01-20 18:56 ` Nadav Amit
2025-01-21 2:33 ` Rik van Riel
2025-01-16 2:30 ` [PATCH v5 11/12] x86/mm: enable AMD translation cache extensions Rik van Riel
2025-01-16 2:30 ` [PATCH v5 12/12] x86/mm: only invalidate final translations with INVLPGB Rik van Riel
2025-01-16 18:14 ` [PATCH v5 00/12] AMD broadcast TLB invalidation Michael Kelley
2025-01-16 22:37 ` Peter Zijlstra
2025-01-17 0:00 ` Andrew Cooper
2025-01-21 10:45 ` Peter Zijlstra
2025-01-21 17:14 ` Dave Hansen
2025-01-21 21:24 ` Michael Kelley
2025-01-21 17:22 ` Jann Horn
2025-01-21 21:39 ` Michael Kelley
2025-01-21 21:56 ` Jann Horn
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