From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.4 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3C05C47404 for ; Fri, 4 Oct 2019 07:22:53 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 85C752084D for ; Fri, 4 Oct 2019 07:22:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="aKQid1oy" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 85C752084D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 195B96B0003; Fri, 4 Oct 2019 03:22:53 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 146E76B0005; Fri, 4 Oct 2019 03:22:53 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 034196B0007; Fri, 4 Oct 2019 03:22:52 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0048.hostedemail.com [216.40.44.48]) by kanga.kvack.org (Postfix) with ESMTP id D0FD46B0003 for ; Fri, 4 Oct 2019 03:22:52 -0400 (EDT) Received: from smtpin26.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay01.hostedemail.com (Postfix) with SMTP id 7A60E180AD826 for ; Fri, 4 Oct 2019 07:22:52 +0000 (UTC) X-FDA: 76005260184.26.snail80_7031c83b27936 X-HE-Tag: snail80_7031c83b27936 X-Filterd-Recvd-Size: 5340 Received: from us-smtp-1.mimecast.com (us-smtp-delivery-1.mimecast.com [207.211.31.120]) by imf20.hostedemail.com (Postfix) with ESMTP for ; Fri, 4 Oct 2019 07:22:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1570173770; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:openpgp:openpgp; bh=ZZFTUGEUKAOtLqz6071gHP1dbpBLVQ8hfKF55tUq/KQ=; b=aKQid1oyWiT2ta8pn3lK+uVA8l+LGRym4BTPmSOux2piPfFU9hpOv2/Ku2bxE5WRsBfFpJ zlmv7KATx6VlOmPZjfiadPeGHcKrDeQ/YBSbJ608LTKJWBxcFCCS6qbOJ2BgggfsPpj9dC zfxa8K3G1ZKDMGpTYgt3K5hndHFcTh8= Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-291-PuJjZ-FUPP6p0NGUSjCIZA-1; Fri, 04 Oct 2019 03:22:44 -0400 Received: by mail-wr1-f71.google.com with SMTP id c17so2016698wro.18 for ; Fri, 04 Oct 2019 00:22:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:openpgp:message-id :date:user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=ILNTMth44lhyhVxp81yLHyMCFOzyjpLW4hR5n2e7NXY=; b=AH96W/28fW3h6w7HU97uY2EKlJideWn/tX0WNLRYf+z4p3YbHESnw/bZ/Qehctf579 de3KpJh8GaSSbLF6Or9AX8N3woZ2Jq20cS1K/gKNX6VAXCl09Tk/h7xWOwttD6F3zmFm dAnTSH+SGqYjkfSTBBwV3+IxqYJFL04kNsbm8wwszL+HuIF4ktPprQKXvrCL44Si4pzi tV5obU30evNyaGEHvVZZuBJ7SODdzcEw3I/34NLzoEo8XAUc6D/oqtSDauATSqklzJDF xLd96Xh8yn8ZBvsZ89RMMCJE9oh7o+2UkE/WY0vZc5V5bJt/FcFoVWlSdvyvk3BjRFW5 9GRA== X-Gm-Message-State: APjAAAUmuoYApIkILOjVkATxFGggPMxa6AZ7RCRQKNdL9okY4QF8Pzdh dsQ6TYuhIPQTIlKQdrN2MN9VANQqc7vMlG4inuyE5N1LwNh5UuwKUeqwjjshwSuBMGdZNhfcqyt cez7pK1C8jZg= X-Received: by 2002:a5d:63ca:: with SMTP id c10mr10778921wrw.314.1570173763354; Fri, 04 Oct 2019 00:22:43 -0700 (PDT) X-Google-Smtp-Source: APXvYqwEDGvpXlmcBz9oOFWe0DyzE8bVjNOqBDdH/xvILz6ksCyS5v4csWDZufvLcv4gql6PnY37oA== X-Received: by 2002:a5d:63ca:: with SMTP id c10mr10778904wrw.314.1570173763052; Fri, 04 Oct 2019 00:22:43 -0700 (PDT) Received: from ?IPv6:2001:b07:6468:f312:e56d:fbdf:8b79:c79c? ([2001:b07:6468:f312:e56d:fbdf:8b79:c79c]) by smtp.gmail.com with ESMTPSA id r20sm9288291wrg.61.2019.10.04.00.22.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Oct 2019 00:22:42 -0700 (PDT) Subject: Re: [RFC PATCH 00/13] XOM for KVM guest userspace To: Rick Edgecombe , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org, luto@kernel.org, peterz@infradead.org, dave.hansen@intel.com, sean.j.christopherson@intel.com, keescook@chromium.org Cc: kristen@linux.intel.com, deneen.t.dock@intel.com References: <20191003212400.31130-1-rick.p.edgecombe@intel.com> From: Paolo Bonzini Openpgp: preference=signencrypt Message-ID: Date: Fri, 4 Oct 2019 09:22:42 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20191003212400.31130-1-rick.p.edgecombe@intel.com> Content-Language: en-US X-MC-Unique: PuJjZ-FUPP6p0NGUSjCIZA-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 03/10/19 23:23, Rick Edgecombe wrote: > Since software would have previously received a #PF with the RSVD error c= ode > set, when the HW encountered any set bits in the region 51 to M, there wa= s some > internal discussion on whether this should have a virtual MSR for the OS = to turn > it on only if the OS knows it isn't relying on this behavior for bit M. T= he > argument against needing an MSR is this blurb from the Intel SDM about re= served > bits: > "Bits reserved in the paging-structure entries are reserved for future > functionality. Software developers should be aware that such bits may be = used in > the future and that a paging-structure entry that causes a page-fault exc= eption > on one processor might not do so in the future." >=20 > So in the current patchset there is no MSR write required for the guest t= o turn > on this feature. It will have this behavior whenever qemu is run with > "-cpu +xo". I think the part of the manual that you quote is out of date. Whenever Intel has "unreserved" bits in the page tables they have done that only if specific bits in CR4 or EFER or VMCS execution controls are set; this is a good thing, and I'd really like it to be codified in the SDM. The only bits for which this does not (and should not) apply are indeed bits 51:MAXPHYADDR. But the SDM makes it clear that bits 51:MAXPHYADDR are reserved, hence "unreserving" bits based on just a QEMU command line option would be against the specification. So, please don't do this and introduce an MSR that enables the feature. Paolo