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From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Mike Rapoport <rppt@kernel.org>
Cc: Tiezhu Yang <yangtiezhu@loongson.cn>,
	 Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	 Andrew Morton <akpm@linux-foundation.org>,
	 Xuefeng Li <lixuefeng@loongson.cn>,
	linux-mips@vger.kernel.org,  linux-mm@kvack.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 0/4] MIPS: Modify mem= and memmap= parameter
Date: Sun, 6 Mar 2022 01:22:58 +0000 (GMT)	[thread overview]
Message-ID: <alpine.DEB.2.21.2203060110210.47558@angie.orcam.me.uk> (raw)
In-Reply-To: <YiPDfhfwYUQy9Pfd@kernel.org>

On Sat, 5 Mar 2022, Mike Rapoport wrote:

> >  There's nothing to implement as the MIPS port has supported arbitrary 
> > memory maps since Dec 11th, 2000; that's almost 22 years now.  C.f.: 
> > <https://lore.kernel.org/linux-mips/Pine.GSO.3.96.1000814133957.7256S-100000@delta.ds2.pg.gda.pl/>, 
> > <https://git.kernel.org/pub/scm/linux/kernel/git/ralf/linux.git/commit/?id=97b7ae4257ef>.
> 
> You are right, and providing mem=X@Y for each contiguous memory range
> should work even after 22 years.
> I missed the fact that mem= can be repeated several times.

 Yep, I have now finally tracked down the original bootstrap log for the 
first try of that change:

This DECstation is a DS5000/2x0
Loading R[23]00 MMU routines.
CPU revision is: 00000230
Primary instruction cache 64kb, linesize 4 bytes
Primary data cache 64kb, linesize 4 bytes
Linux version 2.4.0-test5 (macro@macro.ds2.pg.gda.pl) (gcc version 2.95.3 19991030 (prerelease)) #16 Sun Aug 13 16:43:22 CEST 2000
PROM-provided physical RAM map:
 memory: 06800000 @ 00000000
 memory: 00800000 @ 08000000
 memory: 00800000 @ 0a000000
User-defined physical RAM map:
 memory: 06800000 @ 00000000
 memory: 00800000 @ 08000000
 memory: 00800000 @ 0a000000
 memory: 00800000 @ 0c000000
On node 0 totalpages: 51200
zone(0): 51200 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: rw console=ttyS2 mem=104M@0M mem=8M@128M mem=8M@160M mem=8M@192M
Calibrating delay loop... 39.85 BogoMIPS
Memory: 127852k/204800k available (2403k kernel code, 76948k reserved, 610k data, 72k init)
[...]

NB that system is still in service, with more RAM since added.

> >  Sadly commit a09fc446fb6d ("[MIPS] setup.c: use early_param() for early 
> > command line parsing") removed last pieces of inline documentation; I 
> > don't know why things like that get approved, but neither I can take 
> > responsibility.
> 
> This is sad indeed, but we still can update the kernel-parameters.txt with
> a MIPS paragraph.

 Sure, patches are welcome.

  Maciej


  reply	other threads:[~2022-03-06  1:23 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-01  4:28 Tiezhu Yang
2022-03-01  4:28 ` [PATCH v4 1/4] MIPS: Refactor early_parse_mem() to fix mem= parameter Tiezhu Yang
2022-03-04 15:10   ` Thomas Bogendoerfer
2022-03-04 15:35     ` Thomas Bogendoerfer
2022-03-04 17:11       ` Maciej W. Rozycki
2022-03-05 13:13         ` Mike Rapoport
2022-03-07 16:29         ` Thomas Bogendoerfer
2022-03-07 22:07           ` Mike Rapoport
2022-03-07 23:09             ` Maciej W. Rozycki
2022-03-01  4:28 ` [PATCH v4 2/4] memblock: Introduce memblock_mem_range_remove_map() Tiezhu Yang
2022-03-01  4:29 ` [PATCH v4 3/4] MIPS: Refactor early_parse_memmap() to fix memmap= parameter Tiezhu Yang
2022-03-01  4:29 ` [PATCH v4 4/4] MIPS: Remove not used variable usermem Tiezhu Yang
2022-03-01  9:55 ` [PATCH v4 0/4] MIPS: Modify mem= and memmap= parameter Mike Rapoport
2022-03-01 11:51   ` Tiezhu Yang
2022-03-01 14:31     ` Mike Rapoport
2022-03-02  1:50       ` Tiezhu Yang
2022-03-02  8:03         ` Mike Rapoport
2022-03-02  9:28           ` Tiezhu Yang
2022-03-02 12:50             ` Mike Rapoport
2022-03-04 17:05         ` Maciej W. Rozycki
2022-03-05  6:19           ` Tiezhu Yang
2022-03-05 13:26             ` Mike Rapoport
2022-03-05 19:21               ` Maciej W. Rozycki
2022-03-05 20:09                 ` Mike Rapoport
2022-03-06  1:22                   ` Maciej W. Rozycki [this message]
2022-03-05 20:53                 ` Maciej W. Rozycki

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