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[2a01:7a0:2:106d:700::1]) by mx.google.com with ESMTPS id v10si2574627wrn.34.2019.06.14.07.21.52 for (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 14 Jun 2019 07:21:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of tglx@linutronix.de designates 2a01:7a0:2:106d:700::1 as permitted sender) client-ip=2a01:7a0:2:106d:700::1; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of tglx@linutronix.de designates 2a01:7a0:2:106d:700::1 as permitted sender) smtp.mailfrom=tglx@linutronix.de Received: from [5.158.153.52] (helo=nanos.tec.linutronix.de) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1hbn5M-0007a1-1S; Fri, 14 Jun 2019 16:21:44 +0200 Date: Fri, 14 Jun 2019 16:21:43 +0200 (CEST) From: Thomas Gleixner To: Andy Lutomirski cc: Dave Hansen , Marius Hillenbrand , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-hardening@lists.openwall.com, linux-mm@kvack.org, Alexander Graf , David Woodhouse , the arch/x86 maintainers , Andy Lutomirski , Peter Zijlstra Subject: Re: [RFC 00/10] Process-local memory allocations for hiding KVM secrets In-Reply-To: Message-ID: References: <20190612170834.14855-1-mhillenb@amazon.de> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-1104140577-1560522104=:1722" X-Bogosity: Ham, tests=bogofilter, spamicity=0.000503, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1104140577-1560522104=:1722 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT On Wed, 12 Jun 2019, Andy Lutomirski wrote: > > On Jun 12, 2019, at 12:55 PM, Dave Hansen wrote: > > > >> On 6/12/19 10:08 AM, Marius Hillenbrand wrote: > >> This patch series proposes to introduce a region for what we call > >> process-local memory into the kernel's virtual address space. > > > > It might be fun to cc some x86 folks on this series. They might have > > some relevant opinions. ;) > > > > A few high-level questions: > > > > Why go to all this trouble to hide guest state like registers if all the > > guest data itself is still mapped? > > > > Where's the context-switching code? Did I just miss it? > > > > We've discussed having per-cpu page tables where a given PGD is only in > > use from one CPU at a time. I *think* this scheme still works in such a > > case, it just adds one more PGD entry that would have to context-switched. > > Fair warning: Linus is on record as absolutely hating this idea. He might > change his mind, but it’s an uphill battle. Yes I know, but as a benefit we could get rid of all the GSBASE horrors in the entry code as we could just put the percpu space into the local PGD. Thanks, tglx --8323329-1104140577-1560522104=:1722--