From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail6.bemta7.messagelabs.com (mail6.bemta7.messagelabs.com [216.82.255.55]) by kanga.kvack.org (Postfix) with ESMTP id 875A06B0169 for ; Thu, 25 Aug 2011 13:07:48 -0400 (EDT) Date: Thu, 25 Aug 2011 12:07:44 -0500 (CDT) From: Christoph Lameter Subject: Re: [PATCH] memcg: remove unneeded preempt_disable In-Reply-To: <986ca4ed-6810-426f-b32f-5c8687e3a10b@email.android.com> Message-ID: References: <1313650253-21794-1-git-send-email-gthelen@google.com> <20110818144025.8e122a67.akpm@linux-foundation.org> <1314284272.27911.32.camel@twins> <1314289208.3268.4.camel@mulgrave> <986ca4ed-6810-426f-b32f-5c8687e3a10b@email.android.com> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: owner-linux-mm@kvack.org List-ID: To: James Bottomley Cc: Peter Zijlstra , Andrew Morton , Greg Thelen , linux-kernel@vger.kernel.org, linux-mm@kvack.org, KAMEZAWA Hiroyuki , Balbir Singh , Daisuke Nishimura , linux-arch@vger.kernel.org On Thu, 25 Aug 2011, James Bottomley wrote: > >ARM seems to have these LDREX/STREX instructions for that purpose which > >seem to be used for generating atomic instructions without lockes. I > >guess > >other RISC architectures have similar means of doing it? > > Arm isn't really risc. Most don't. However even with ldrex/strex you need two instructions for rmw. Well then what is "really risc"? RISC is an old beaten down marketing term AFAICT and ARM claims it too. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Fight unfair telecom internet charges in Canada: sign http://stopthemeter.ca/ Don't email: email@kvack.org