From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_INVALID,DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E509EC4363D for ; Thu, 24 Sep 2020 22:51:52 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 72AB62344C for ; Thu, 24 Sep 2020 22:51:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=google.com header.i=@google.com header.b="QaNn3Q1s" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 72AB62344C Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id F25338E001B; Thu, 24 Sep 2020 18:51:51 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id EAF9E8E0001; Thu, 24 Sep 2020 18:51:51 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id D0A578E001B; Thu, 24 Sep 2020 18:51:51 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0148.hostedemail.com [216.40.44.148]) by kanga.kvack.org (Postfix) with ESMTP id B78028E0001 for ; Thu, 24 Sep 2020 18:51:51 -0400 (EDT) Received: from smtpin15.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay03.hostedemail.com (Postfix) with ESMTP id 7BEFD8249980 for ; Thu, 24 Sep 2020 22:51:51 +0000 (UTC) X-FDA: 77299454022.15.bird11_110bee327162 Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin15.hostedemail.com (Postfix) with ESMTP id 594911814B0C1 for ; Thu, 24 Sep 2020 22:51:51 +0000 (UTC) X-HE-Tag: bird11_110bee327162 X-Filterd-Recvd-Size: 10043 Received: from mail-qt1-f201.google.com (mail-qt1-f201.google.com [209.85.160.201]) by imf16.hostedemail.com (Postfix) with ESMTP for ; Thu, 24 Sep 2020 22:51:50 +0000 (UTC) Received: by mail-qt1-f201.google.com with SMTP id e6so504322qtg.13 for ; Thu, 24 Sep 2020 15:51:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:date:in-reply-to:message-id:mime-version:references:subject :from:to:cc; bh=fTQzr3b/f/Y2f2WUZm2mA8+YP+UMaet6Rq3JBXSottg=; b=QaNn3Q1sgloPlX7yR4OMmU/rOVvtzNcckmbmrJQlH8pdcDp5m0gXcQmajY/ADXYu/0 iUilnvPlJwaobmG+AdvR399CwhcjQOSFN1oxA1uD7pBiqaNV2QaBM1AAPuCJikSZnVL5 Ij8XfdFmuJy8QfPtF4s0Jk6Yy+uPOXAT0xw+pQnS89u14u/ZDaJW4IgXa5xzmbY70954 dDDHsLmgOFP6RX6iZQrZJbdhzhbQDcaC+ZaQ21eqLs7+akeoHvVvE2tw0gqanuZb6BIQ 81w8Nqj9lcZhgSfKrN1VxG/Mh4iRVn+Q5/oM78rmVkAq5UZ/NNxxQSj/0HZ7jR9mMAiG ATvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=fTQzr3b/f/Y2f2WUZm2mA8+YP+UMaet6Rq3JBXSottg=; b=K66//WC2ZxasRiSXuAtUtjOJOfiyU5Z3uiZXbq+ry59uA6LliDWyyO6+EziXCvyhCD 0C0mnHLNGpbREWQafzBJXVbpyugohGns8vPyM7mkw2rFZ1o6us6bd8v9jgrmTnDkfaQ8 v8C+BZqXKVLvodo/pK91z7RV94weRY1N3Cf5IIcSX6xRFnpBKyxxyvoGir13t/NNhFFF YSFdjmLNayuuWiRMcU2zny34PKjbdVoMckntyVmB390Z3L3D6fRKoP/oE0HHMw0vwBV6 LJtHGG4c1FNQ/FBzTo6WX/65hLPxxjUHNJWNYLiTPN/0ePxIGpBuk9xkpSW+wIH8DE6d K5Og== X-Gm-Message-State: AOAM53059Yju0fvZII7h+vtHNyH7ts8Iy+LQQ0nn2WOZM1pa03UTMFo1 tt6AmOfxhzbQwqFz6cJdHLaqhmeavimGiS/g X-Google-Smtp-Source: ABdhPJy0XlPlQ/tqMhzSX8OHfcz/CiC5KA/DNjLI1u7y/ZAXQXBNQUfo6XZtJNxaYgzJ+NrvBv8fvceHD3jUyYcE X-Received: from andreyknvl3.muc.corp.google.com ([2a00:79e0:15:13:7220:84ff:fe09:7e9d]) (user=andreyknvl job=sendgmr) by 2002:ad4:58aa:: with SMTP id ea10mr1647878qvb.58.1600987910123; Thu, 24 Sep 2020 15:51:50 -0700 (PDT) Date: Fri, 25 Sep 2020 00:50:31 +0200 In-Reply-To: Message-Id: Mime-Version: 1.0 References: X-Mailer: git-send-email 2.28.0.681.g6f77f65b4e-goog Subject: [PATCH v3 24/39] arm64: mte: Add in-kernel MTE helpers From: Andrey Konovalov To: Dmitry Vyukov , Vincenzo Frascino , Catalin Marinas , kasan-dev@googlegroups.com Cc: Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Elena Petrova , Branislav Rankov , Kevin Brodsky , Will Deacon , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andrey Konovalov Content-Type: text/plain; charset="UTF-8" X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Vincenzo Frascino Provide helper functions to manipulate allocation and pointer tags for kernel addresses. Low-level helper functions (mte_assign_*, written in assembly) operate tag values from the [0x0, 0xF] range. High-level helper functions (mte_get/set_*) use the [0xF0, 0xFF] range to preserve compatibility with normal kernel pointers that have 0xFF in their top byte. MTE_GRANULE_SIZE and related definitions are moved to mte-def.h header that doesn't have any dependencies and is safe to include into any low-level header. Signed-off-by: Vincenzo Frascino Co-developed-by: Andrey Konovalov Signed-off-by: Andrey Konovalov --- Change-Id: I1b5230254f90dc21a913447cb17f07fea7944ece --- arch/arm64/include/asm/esr.h | 1 + arch/arm64/include/asm/mte-kasan.h | 60 ++++++++++++++++++++++++++++++ arch/arm64/include/asm/mte.h | 17 ++++++--- arch/arm64/kernel/mte.c | 44 ++++++++++++++++++++++ arch/arm64/lib/mte.S | 19 ++++++++++ 5 files changed, 135 insertions(+), 6 deletions(-) create mode 100644 arch/arm64/include/asm/mte-kasan.h diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index 035003acfa87..bc0dc66a6a27 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -103,6 +103,7 @@ #define ESR_ELx_FSC (0x3F) #define ESR_ELx_FSC_TYPE (0x3C) #define ESR_ELx_FSC_EXTABT (0x10) +#define ESR_ELx_FSC_MTE (0x11) #define ESR_ELx_FSC_SERROR (0x11) #define ESR_ELx_FSC_ACCESS (0x08) #define ESR_ELx_FSC_FAULT (0x04) diff --git a/arch/arm64/include/asm/mte-kasan.h b/arch/arm64/include/asm/mte-kasan.h new file mode 100644 index 000000000000..b0f27de8de33 --- /dev/null +++ b/arch/arm64/include/asm/mte-kasan.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020 ARM Ltd. + */ +#ifndef __ASM_MTE_ASM_H +#define __ASM_MTE_ASM_H + +#include + +#define __MTE_PREAMBLE ARM64_ASM_PREAMBLE ".arch_extension memtag\n" + +#define MTE_GRANULE_SIZE UL(16) +#define MTE_GRANULE_MASK (~(MTE_GRANULE_SIZE - 1)) +#define MTE_TAG_SHIFT 56 +#define MTE_TAG_SIZE 4 +#define MTE_TAG_MASK GENMASK((MTE_TAG_SHIFT + (MTE_TAG_SIZE - 1)), MTE_TAG_SHIFT) +#define MTE_TAG_MAX (MTE_TAG_MASK >> MTE_TAG_SHIFT) + +#ifndef __ASSEMBLY__ + +#include + +#ifdef CONFIG_ARM64_MTE + +static inline u8 mte_get_ptr_tag(void *ptr) +{ + u8 tag = (u8)(((u64)(ptr)) >> MTE_TAG_SHIFT); + + return tag; +} + +u8 mte_get_mem_tag(void *addr); +u8 mte_get_random_tag(void); +void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag); + +#else /* CONFIG_ARM64_MTE */ + +static inline u8 mte_get_ptr_tag(void *ptr) +{ + return 0xFF; +} + +static inline u8 mte_get_mem_tag(void *addr) +{ + return 0xFF; +} +static inline u8 mte_get_random_tag(void) +{ + return 0xFF; +} +static inline void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag) +{ + return addr; +} + +#endif /* CONFIG_ARM64_MTE */ + +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_MTE_ASM_H */ diff --git a/arch/arm64/include/asm/mte.h b/arch/arm64/include/asm/mte.h index 1c99fcadb58c..3a2bf3ccb26c 100644 --- a/arch/arm64/include/asm/mte.h +++ b/arch/arm64/include/asm/mte.h @@ -5,14 +5,13 @@ #ifndef __ASM_MTE_H #define __ASM_MTE_H -#define MTE_GRANULE_SIZE UL(16) -#define MTE_GRANULE_MASK (~(MTE_GRANULE_SIZE - 1)) -#define MTE_TAG_SHIFT 56 -#define MTE_TAG_SIZE 4 +#include #ifndef __ASSEMBLY__ +#include #include +#include #include @@ -45,7 +44,9 @@ long get_mte_ctrl(struct task_struct *task); int mte_ptrace_copy_tags(struct task_struct *child, long request, unsigned long addr, unsigned long data); -#else +void mte_assign_mem_tag_range(void *addr, size_t size); + +#else /* CONFIG_ARM64_MTE */ /* unused if !CONFIG_ARM64_MTE, silence the compiler */ #define PG_mte_tagged 0 @@ -80,7 +81,11 @@ static inline int mte_ptrace_copy_tags(struct task_struct *child, return -EIO; } -#endif +static inline void mte_assign_mem_tag_range(void *addr, size_t size) +{ +} + +#endif /* CONFIG_ARM64_MTE */ #endif /* __ASSEMBLY__ */ #endif /* __ASM_MTE_H */ diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c index 52a0638ed967..833b63fdd5e2 100644 --- a/arch/arm64/kernel/mte.c +++ b/arch/arm64/kernel/mte.c @@ -13,8 +13,10 @@ #include #include #include +#include #include +#include #include #include #include @@ -72,6 +74,48 @@ int memcmp_pages(struct page *page1, struct page *page2) return ret; } +u8 mte_get_mem_tag(void *addr) +{ + if (!system_supports_mte()) + return 0xFF; + + asm volatile(__MTE_PREAMBLE "ldg %0, [%0]" + : "+r" (addr)); + + return 0xF0 | mte_get_ptr_tag(addr); +} + +u8 mte_get_random_tag(void) +{ + void *addr; + + if (!system_supports_mte()) + return 0xFF; + + asm volatile(__MTE_PREAMBLE "irg %0, %0" + : "+r" (addr)); + + return 0xF0 | mte_get_ptr_tag(addr); +} + +void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag) +{ + void *ptr = addr; + + if ((!system_supports_mte()) || (size == 0)) + return addr; + + /* Make sure that size is aligned. */ + WARN_ON(size & (MTE_GRANULE_SIZE - 1)); + + tag = 0xF0 | tag; + ptr = (void *)__tag_set(ptr, tag); + + mte_assign_mem_tag_range(ptr, size); + + return ptr; +} + static void update_sctlr_el1_tcf0(u64 tcf0) { /* ISB required for the kernel uaccess routines */ diff --git a/arch/arm64/lib/mte.S b/arch/arm64/lib/mte.S index 03ca6d8b8670..aa0ab01252fe 100644 --- a/arch/arm64/lib/mte.S +++ b/arch/arm64/lib/mte.S @@ -149,3 +149,22 @@ SYM_FUNC_START(mte_restore_page_tags) ret SYM_FUNC_END(mte_restore_page_tags) + +/* + * Assign allocation tags for a region of memory based on the pointer tag + * x0 - source pointer + * x1 - size + * + * Note: size must be non-zero and MTE_GRANULE_SIZE aligned + */ +SYM_FUNC_START(mte_assign_mem_tag_range) + /* if (src == NULL) return; */ + cbz x0, 2f + /* if (size == 0) return; */ + cbz x1, 2f +1: stg x0, [x0] + add x0, x0, #MTE_GRANULE_SIZE + subs x1, x1, #MTE_GRANULE_SIZE + b.gt 1b +2: ret +SYM_FUNC_END(mte_assign_mem_tag_range) -- 2.28.0.681.g6f77f65b4e-goog