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From: Johannes Weiner <hannes@cmpxchg.org>
To: Zi Yan <ziy@nvidia.com>
Cc: "David Hildenbrand (Arm)" <david@kernel.org>,
	Usama Arif <usama.arif@linux.dev>,
	willy@infradead.org, Lorenzo Stoakes <lorenzo.stoakes@oracle.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	lsf-pc@lists.linux-foundation.org, linux-mm@kvack.org,
	riel@surriel.com, Shakeel Butt <shakeel.butt@linux.dev>,
	Kiryl Shutsemau <kas@kernel.org>, Barry Song <baohua@kernel.org>,
	Dev Jain <dev.jain@arm.com>,
	Baolin Wang <baolin.wang@linux.alibaba.com>,
	Nico Pache <npache@redhat.com>,
	"Liam R . Howlett" <Liam.Howlett@oracle.com>,
	Ryan Roberts <ryan.roberts@arm.com>,
	Vlastimil Babka <vbabka@suse.cz>,
	Lance Yang <lance.yang@linux.dev>,
	Frank van der Linden <fvdl@google.com>
Subject: Re: [LSF/MM/BPF TOPIC] Beyond 2MB: Why Terabyte-Scale Machines Need 1GB Transparent Huge Pages
Date: Thu, 19 Feb 2026 12:08:28 -0500	[thread overview]
Message-ID: <aZdDjA16yQYV9csN@cmpxchg.org> (raw)
In-Reply-To: <A4DDD3A2-104A-42BD-B174-676012166BEC@nvidia.com>

On Thu, Feb 19, 2026 at 11:52:57AM -0500, Zi Yan wrote:
> On 19 Feb 2026, at 11:48, Johannes Weiner wrote:
> 
> > On Thu, Feb 19, 2026 at 05:00:19PM +0100, David Hildenbrand (Arm) wrote:
> >>
> >>>
> >>> I see 1G THPs being opportunistically used ideally at the start of the application
> >>> or by the allocator (jemalloc/tcmalloc) when there is plenty of free memory
> >>> available and a greater chance of getting 1G THPs.
> >>>
> >>> Splitting strategy
> >>> ==================
> >>>
> >>> When PUD THP must be break -- for COW after fork, partial munmap, mprotect on
> >>> a subregion, or reclaim -- it splits directly from PUD to PTE level, converting
> >>> 1 PUD entry into 262,144 PTE entries. The ideal solution would be to split to
> >>> PMDs and only the necessary PMDs to PTEs. This is something that would hopefully
> >>> be possible with Davids proposal [3].
> >>
> >> There once was this proposal where we would, instead of splitting a THP,
> >> migrate all memory away instead. That means, instead of splitting the 1
> >> GiB THP, you would instead return it to the page allocator where
> >> somebody else could use it.
> >
> > With TLB coalescing, there is benefit in preserving contiguity. If you
> > lop off the last 4k of a 2M-backed range, a split still gives you 511
> > contiguously mapped pfns that can be coalesced.
> 
> Which CPU are you referring to? AMD’s PTE coalescing works up to 32KB
> and ARM’s contig PTE supports larger sizes. BTW, do we have PMD level
> ARM contiguous bit support?

I'm not aware of a CPU that will coalesce the 511 entries into a
single one. But *any* coalescing effects will be lost when the range
is scattered into discontiguous 4k pagelets.


  reply	other threads:[~2026-02-19 17:08 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-19 15:53 Usama Arif
2026-02-19 16:00 ` David Hildenbrand (Arm)
2026-02-19 16:48   ` Johannes Weiner
2026-02-19 16:52     ` Zi Yan
2026-02-19 17:08       ` Johannes Weiner [this message]
2026-02-19 17:09         ` David Hildenbrand (Arm)
2026-02-19 17:09       ` David Hildenbrand (Arm)
2026-02-19 16:49   ` Zi Yan
2026-02-19 17:13     ` Matthew Wilcox
2026-02-19 17:28       ` Zi Yan
2026-02-19 19:02 ` Rik van Riel
2026-02-20 10:00   ` David Hildenbrand (Arm)

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