From: Sean Christopherson <seanjc@google.com>
To: Lance Yang <lance.yang@linux.dev>
Cc: akpm@linux-foundation.org, david@kernel.org,
dave.hansen@intel.com, dave.hansen@linux.intel.com,
ypodemsk@redhat.com, hughd@google.com, will@kernel.org,
aneesh.kumar@kernel.org, npiggin@gmail.com,
peterz@infradead.org, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, x86@kernel.org, hpa@zytor.com, arnd@arndb.de,
lorenzo.stoakes@oracle.com, ziy@nvidia.com,
baolin.wang@linux.alibaba.com, Liam.Howlett@oracle.com,
npache@redhat.com, ryan.roberts@arm.com, dev.jain@arm.com,
baohua@kernel.org, shy828301@gmail.com, riel@surriel.com,
jannh@google.com, jgross@suse.com, pbonzini@redhat.com,
boris.ostrovsky@oracle.com, virtualization@lists.linux.dev,
kvm@vger.kernel.org, linux-arch@vger.kernel.org,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
ioworker0@gmail.com
Subject: Re: [PATCH v4 3/3] x86/tlb: add architecture-specific TLB IPI optimization support
Date: Wed, 25 Feb 2026 12:11:30 -0800 [thread overview]
Message-ID: <aZ9Xcgxa0_ouGr31@google.com> (raw)
In-Reply-To: <20260202074557.16544-4-lance.yang@linux.dev>
On Mon, Feb 02, 2026, Lance Yang wrote:
> diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
> index 37dc8465e0f5..6a5e47ee4eb6 100644
> --- a/arch/x86/kernel/kvm.c
> +++ b/arch/x86/kernel/kvm.c
> @@ -856,6 +856,12 @@ static void __init kvm_guest_init(void)
> #ifdef CONFIG_SMP
> if (pv_tlb_flush_supported()) {
> pv_ops.mmu.flush_tlb_multi = kvm_flush_tlb_multi;
> + /*
> + * KVM's flush implementation calls native_flush_tlb_multi(),
> + * which sends real IPIs when INVLPGB is not available.
Not on all (virtual) CPUs. The entire point of KVM's PV TLB flush is to elide
the IPIs. If a vCPU was scheduled out by the host, the guest sets a flag and
relies on the host to flush the TLB on behalf of the guest prior to the next
VM-Enter.
for_each_cpu(cpu, flushmask) {
/*
* The local vCPU is never preempted, so we do not explicitly
* skip check for local vCPU - it will never be cleared from
* flushmask.
*/
src = &per_cpu(steal_time, cpu);
state = READ_ONCE(src->preempted);
if ((state & KVM_VCPU_PREEMPTED)) {
if (try_cmpxchg(&src->preempted, &state,
state | KVM_VCPU_FLUSH_TLB))
__cpumask_clear_cpu(cpu, flushmask); <=== removes CPU from the IPI set
}
}
native_flush_tlb_multi(flushmask, info);
> + if (!cpu_feature_enabled(X86_FEATURE_INVLPGB))
> + pv_ops.mmu.flush_tlb_multi_implies_ipi_broadcast = true;
> pr_info("KVM setup pv remote TLB flush\n");
> }
next prev parent reply other threads:[~2026-02-25 20:11 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-02 7:45 [PATCH v4 0/3] targeted TLB sync IPIs for lockless page table walkers Lance Yang
2026-02-02 7:45 ` [PATCH v4 1/3] mm: use targeted IPIs for TLB sync with " Lance Yang
2026-02-02 9:42 ` Peter Zijlstra
2026-02-02 12:14 ` Lance Yang
2026-02-02 12:51 ` Peter Zijlstra
2026-02-02 13:23 ` Lance Yang
2026-02-02 13:42 ` Peter Zijlstra
2026-02-02 14:28 ` Lance Yang
2026-02-02 16:20 ` Dave Hansen
2026-02-02 7:45 ` [PATCH v4 2/3] mm: switch callers to tlb_remove_table_sync_mm() Lance Yang
2026-02-02 7:45 ` [PATCH v4 3/3] x86/tlb: add architecture-specific TLB IPI optimization support Lance Yang
2026-02-25 20:11 ` Sean Christopherson [this message]
2026-02-02 9:54 ` [PATCH v4 0/3] targeted TLB sync IPIs for lockless page table walkers Peter Zijlstra
2026-02-02 11:00 ` [PATCH v4 0/3] targeted TLB sync IPIs for lockless page table Lance Yang
2026-02-02 12:50 ` Peter Zijlstra
2026-02-02 12:58 ` Lance Yang
2026-02-02 13:07 ` Lance Yang
2026-02-02 13:37 ` Peter Zijlstra
2026-02-02 14:37 ` Lance Yang
2026-02-02 15:09 ` Peter Zijlstra
2026-02-02 15:52 ` Lance Yang
2026-02-05 13:25 ` David Hildenbrand (Arm)
2026-02-05 15:01 ` Lance Yang
2026-02-05 15:05 ` David Hildenbrand (Arm)
2026-02-05 15:28 ` Lance Yang
2026-02-05 15:09 ` Dave Hansen
2026-02-05 15:31 ` Lance Yang
2026-02-05 15:41 ` Dave Hansen
2026-02-05 16:30 ` Lance Yang
2026-02-05 16:46 ` David Hildenbrand (Arm)
2026-02-05 16:48 ` Matthew Wilcox
2026-02-05 17:06 ` David Hildenbrand (Arm)
2026-02-05 18:36 ` Dave Hansen
2026-02-05 22:49 ` David Hildenbrand (Arm)
2026-02-05 21:30 ` David Hildenbrand (Arm)
2026-02-05 17:00 ` Dave Hansen
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