From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9761AC433DF for ; Thu, 27 Aug 2020 10:43:59 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 574C022B40 for ; Thu, 27 Aug 2020 10:43:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 574C022B40 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 046E78E000B; Thu, 27 Aug 2020 06:43:59 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id F12328E0003; Thu, 27 Aug 2020 06:43:58 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id E017D8E000B; Thu, 27 Aug 2020 06:43:58 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0151.hostedemail.com [216.40.44.151]) by kanga.kvack.org (Postfix) with ESMTP id C5A328E0003 for ; Thu, 27 Aug 2020 06:43:58 -0400 (EDT) Received: from smtpin01.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay01.hostedemail.com (Postfix) with ESMTP id 89A9E180AD815 for ; Thu, 27 Aug 2020 10:43:58 +0000 (UTC) X-FDA: 77196013356.01.toe61_270e6c52706c Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin01.hostedemail.com (Postfix) with ESMTP id 4A77D1004DD63 for ; Thu, 27 Aug 2020 10:43:58 +0000 (UTC) X-HE-Tag: toe61_270e6c52706c X-Filterd-Recvd-Size: 3173 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by imf31.hostedemail.com (Postfix) with ESMTP for ; Thu, 27 Aug 2020 10:43:57 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 07723101E; Thu, 27 Aug 2020 03:43:57 -0700 (PDT) Received: from [192.168.1.190] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EF7063F66B; Thu, 27 Aug 2020 03:43:53 -0700 (PDT) Subject: Re: [PATCH 22/35] arm64: mte: Enable in-kernel MTE To: Catalin Marinas , Andrey Konovalov Cc: Dmitry Vyukov , kasan-dev@googlegroups.com, Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Elena Petrova , Branislav Rankov , Kevin Brodsky , Will Deacon , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org References: <6a83a47d9954935d37a654978e96c951cc56a2f6.1597425745.git.andreyknvl@google.com> <20200827100155.GD29264@gaia> From: Vincenzo Frascino Message-ID: Date: Thu, 27 Aug 2020 11:46:07 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200827100155.GD29264@gaia> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Rspamd-Queue-Id: 4A77D1004DD63 X-Spamd-Result: default: False [0.00 / 100.00] X-Rspamd-Server: rspam01 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 8/27/20 11:01 AM, Catalin Marinas wrote: > On Fri, Aug 14, 2020 at 07:27:04PM +0200, Andrey Konovalov wrote: >> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c >> index 4d3abb51f7d4..4d94af19d8f6 100644 >> --- a/arch/arm64/kernel/cpufeature.c >> +++ b/arch/arm64/kernel/cpufeature.c >> @@ -1670,6 +1670,9 @@ static void cpu_enable_mte(struct arm64_cpu_capabilities const *cap) >> write_sysreg_s(0, SYS_TFSR_EL1); >> write_sysreg_s(0, SYS_TFSRE0_EL1); >> >> + /* Enable Match-All at EL1 */ >> + sysreg_clear_set(tcr_el1, 0, SYS_TCR_EL1_TCMA1); >> + >> /* >> * CnP must be enabled only after the MAIR_EL1 register has been set >> * up. Inconsistent MAIR_EL1 between CPUs sharing the same TLB may >> @@ -1687,6 +1690,9 @@ static void cpu_enable_mte(struct arm64_cpu_capabilities const *cap) >> mair &= ~MAIR_ATTRIDX(MAIR_ATTR_MASK, MT_NORMAL_TAGGED); >> mair |= MAIR_ATTRIDX(MAIR_ATTR_NORMAL_TAGGED, MT_NORMAL_TAGGED); >> write_sysreg_s(mair, SYS_MAIR_EL1); >> + >> + /* Enable MTE Sync Mode for EL1 */ >> + sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_SYNC); > > In the 8th incarnation of the user MTE patches, this initialisation > moved to proc.S before the MMU is initialised. When rebasing, please > take this into account. > Thank you for the heads up. -- Regards, Vincenzo