Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

[Guenter Roeck <linux@roeck-us.net>]

On 5/17/21 6:55 AM, Aneesh Kumar K.V wrote:
> Guenter Roeck <linux@roeck-us.net> writes:
> 
>> On 5/17/21 1:40 AM, Aneesh Kumar K.V wrote:
>>> On 5/15/21 10:05 PM, Guenter Roeck wrote:
>>>> On Thu, Apr 22, 2021 at 11:13:19AM +0530, Aneesh Kumar K.V wrote:
> 
> ...
> 
>>>>    extern void radix__local_flush_all_mm(struct mm_struct *mm);
>>>>> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/powerpc/include/asm/book3s/64/tlbflush.h
>>>>> index 215973b4cb26..f9f8a3a264f7 100644
>>>>> --- a/arch/powerpc/include/asm/book3s/64/tlbflush.h
>>>>> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h
>>>>> @@ -45,13 +45,30 @@ static inline void tlbiel_all_lpid(bool radix)
>>>>>            hash__tlbiel_all(TLB_INVAL_SCOPE_LPID);
>>>>>    }
>>>>> +static inline void flush_pmd_tlb_pwc_range(struct vm_area_struct *vma,
>>>>                    ^^^^
>>>>> +                       unsigned long start,
>>>>> +                       unsigned long end,
>>>>> +                       bool flush_pwc)
>>>>> +{
>>>>> +    if (radix_enabled())
>>>>> +        return radix__flush_pmd_tlb_range(vma, start, end, flush_pwc);
>>>>> +    return hash__flush_tlb_range(vma, start, end);
>>>>           ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>>>>
>>>>> +}
>>>
>>> In this specific case we won't have  build errors because,
>>>
>>> static inline void hash__flush_tlb_range(struct vm_area_struct *vma,
>>>                        unsigned long start, unsigned long end)
>>> {
>>>
>>
>> Sorry, you completely lost me.
>>
>> Building parisc:allnoconfig ... failed
>> --------------
>> Error log:
>> In file included from arch/parisc/include/asm/cacheflush.h:7,
>>                    from include/linux/highmem.h:12,
>>                    from include/linux/pagemap.h:11,
>>                    from include/linux/ksm.h:13,
>>                    from mm/mremap.c:14:
>> mm/mremap.c: In function 'flush_pte_tlb_pwc_range':
>> arch/parisc/include/asm/tlbflush.h:20:2: error: 'return' with a value, in function returning void
> 
> As replied here
> https://lore.kernel.org/mm-commits/8eedb441-a612-1ec8-8bf7-b40184de9f6f@linux.ibm.com/
> 
> That was the generic header change in the patch. I was commenting about the
> ppc64 specific change causing build failures.
> 

Ah, sorry. I wasn't aware that the following is valid C code

void f1()
{
     return f2();
     ^^^^^^
}

as long as f2() is void as well. Confusing, but we live and learn.

Guenter