From: Oliver Upton <oliver.upton@linux.dev>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: ankita@nvidia.com, jgg@nvidia.com, maz@kernel.org,
james.morse@arm.com, suzuki.poulose@arm.com,
yuzenghui@huawei.com, reinette.chatre@intel.com,
surenb@google.com, stefanha@redhat.com, brauner@kernel.org,
will@kernel.org, mark.rutland@arm.com,
alex.williamson@redhat.com, kevin.tian@intel.com,
yi.l.liu@intel.com, ardb@kernel.org, akpm@linux-foundation.org,
andreyknvl@gmail.com, wangjinchao@xfusion.com, gshan@redhat.com,
ricarkol@google.com, linux-mm@kvack.org, lpieralisi@kernel.org,
rananta@google.com, ryan.roberts@arm.com, aniketa@nvidia.com,
cjia@nvidia.com, kwankhede@nvidia.com, targupta@nvidia.com,
vsethi@nvidia.com, acurrid@nvidia.com, apopple@nvidia.com,
jhubbard@nvidia.com, danw@nvidia.com, kvmarm@lists.linux.dev,
mochs@nvidia.com, zhiw@nvidia.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 1/4] kvm: arm64: introduce new flag for non-cacheable IO memory
Date: Thu, 8 Feb 2024 13:24:59 +0000 [thread overview]
Message-ID: <ZcTWK6TksvugSlI-@linux.dev> (raw)
In-Reply-To: <ZcTQi0wWZgvl05LB@arm.com>
On Thu, Feb 08, 2024 at 01:00:59PM +0000, Catalin Marinas wrote:
> On Thu, Feb 08, 2024 at 02:16:49AM +0530, ankita@nvidia.com wrote:
> > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> > index c651df904fe3..2a893724ee9b 100644
> > --- a/arch/arm64/kvm/hyp/pgtable.c
> > +++ b/arch/arm64/kvm/hyp/pgtable.c
> > @@ -717,15 +717,28 @@ void kvm_tlb_flush_vmid_range(struct kvm_s2_mmu *mmu,
> > static int stage2_set_prot_attr(struct kvm_pgtable *pgt, enum kvm_pgtable_prot prot,
> > kvm_pte_t *ptep)
> > {
> > - bool device = prot & KVM_PGTABLE_PROT_DEVICE;
> > - kvm_pte_t attr = device ? KVM_S2_MEMATTR(pgt, DEVICE_nGnRE) :
> > - KVM_S2_MEMATTR(pgt, NORMAL);
> > + kvm_pte_t attr;
> > u32 sh = KVM_PTE_LEAF_ATTR_LO_S2_SH_IS;
> >
> > + switch (prot & (KVM_PGTABLE_PROT_DEVICE |
> > + KVM_PGTABLE_PROT_NORMAL_NC)) {
> > + case 0:
> > + attr = KVM_S2_MEMATTR(pgt, NORMAL);
> > + break;
> > + case KVM_PGTABLE_PROT_DEVICE:
> > + if (prot & KVM_PGTABLE_PROT_X)
> > + return -EINVAL;
> > + attr = KVM_S2_MEMATTR(pgt, DEVICE_nGnRE);
> > + break;
> > + case KVM_PGTABLE_PROT_NORMAL_NC:
> > + attr = KVM_S2_MEMATTR(pgt, NORMAL_NC);
> > + break;
>
> Does it make sense to allow executable here as well? I don't think it's
> harmful but not sure there's a use-case for it either.
Ah, we should just return EINVAL for that too.
I get that the memory attribute itself is not problematic, but since
we're only using this thing for MMIO it'd be a rather massive
bug in KVM... We reject attempts to do this earlier in user_mem_abort().
If, for some reason, we wanted to do Normal-NC actual memory then we
would need to make sure that KVM does the appropriate cache maintenance
at map / unmap.
--
Thanks,
Oliver
next prev parent reply other threads:[~2024-02-08 13:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-07 20:46 [PATCH v6 0/4] kvm: arm64: allow the VM to select DEVICE_* and NORMAL_NC for " ankita
2024-02-07 20:46 ` [PATCH v6 1/4] kvm: arm64: introduce new flag for non-cacheable " ankita
2024-02-08 13:00 ` Catalin Marinas
2024-02-08 13:24 ` Oliver Upton [this message]
2024-02-09 14:10 ` Ankit Agrawal
2024-02-08 13:19 ` Will Deacon
2024-02-09 14:12 ` Ankit Agrawal
2024-02-07 20:46 ` [PATCH v6 2/4] mm: introduce new flag to indicate wc safe ankita
2024-02-08 13:03 ` Catalin Marinas
2024-02-08 14:34 ` Jason Gunthorpe
2024-02-07 20:46 ` [PATCH v6 3/4] kvm: arm64: set io memory s2 pte as normalnc for vfio pci device ankita
2024-02-08 13:26 ` Oliver Upton
2024-02-08 14:51 ` Catalin Marinas
2024-02-09 14:05 ` Ankit Agrawal
2024-02-07 20:46 ` [PATCH v6 4/4] vfio: convey kvm that the vfio-pci device is wc safe ankita
2024-02-08 14:53 ` Catalin Marinas
2024-02-08 17:30 ` Alex Williamson
2024-02-08 17:54 ` Jason Gunthorpe
2024-02-09 14:02 ` Ankit Agrawal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZcTWK6TksvugSlI-@linux.dev \
--to=oliver.upton@linux.dev \
--cc=acurrid@nvidia.com \
--cc=akpm@linux-foundation.org \
--cc=alex.williamson@redhat.com \
--cc=andreyknvl@gmail.com \
--cc=aniketa@nvidia.com \
--cc=ankita@nvidia.com \
--cc=apopple@nvidia.com \
--cc=ardb@kernel.org \
--cc=brauner@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=cjia@nvidia.com \
--cc=danw@nvidia.com \
--cc=gshan@redhat.com \
--cc=james.morse@arm.com \
--cc=jgg@nvidia.com \
--cc=jhubbard@nvidia.com \
--cc=kevin.tian@intel.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=kwankhede@nvidia.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=lpieralisi@kernel.org \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=mochs@nvidia.com \
--cc=rananta@google.com \
--cc=reinette.chatre@intel.com \
--cc=ricarkol@google.com \
--cc=ryan.roberts@arm.com \
--cc=stefanha@redhat.com \
--cc=surenb@google.com \
--cc=suzuki.poulose@arm.com \
--cc=targupta@nvidia.com \
--cc=vsethi@nvidia.com \
--cc=wangjinchao@xfusion.com \
--cc=will@kernel.org \
--cc=yi.l.liu@intel.com \
--cc=yuzenghui@huawei.com \
--cc=zhiw@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox