From: Deepak Gupta <debug@rivosinc.com>
To: Zong Li <zong.li@sifive.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Andrew Morton <akpm@linux-foundation.org>,
"Liam R. Howlett" <Liam.Howlett@oracle.com>,
Vlastimil Babka <vbabka@suse.cz>,
Lorenzo Stoakes <lorenzo.stoakes@oracle.com>,
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Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Arnd Bergmann <arnd@arndb.de>,
Christian Brauner <brauner@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Oleg Nesterov <oleg@redhat.com>,
Eric Biederman <ebiederm@xmission.com>,
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Conor Dooley <conor+dt@kernel.org>,
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samitolvanen@google.com, broonie@kernel.org,
rick.p.edgecombe@intel.com
Subject: Re: [PATCH v12 10/28] riscv/mm: Implement map_shadow_stack() syscall
Date: Wed, 9 Apr 2025 07:19:28 -0700 [thread overview]
Message-ID: <Z_aB8EoaqccRz8tn@debug.ba.rivosinc.com> (raw)
In-Reply-To: <CANXhq0rpHMWvJhWNUKuiMvJZoqN5iTz7USmZYHff=se-+-H+3w@mail.gmail.com>
On Mon, Apr 07, 2025 at 12:50:35PM +0800, Zong Li wrote:
>On Sat, Mar 15, 2025 at 5:39 AM Deepak Gupta <debug@rivosinc.com> wrote:
>>
>> As discussed extensively in the changelog for the addition of this
>> syscall on x86 ("x86/shstk: Introduce map_shadow_stack syscall") the
>> existing mmap() and madvise() syscalls do not map entirely well onto the
>> security requirements for shadow stack memory since they lead to windows
>> where memory is allocated but not yet protected or stacks which are not
>> properly and safely initialised. Instead a new syscall map_shadow_stack()
>> has been defined which allocates and initialises a shadow stack page.
>>
>> This patch implements this syscall for riscv. riscv doesn't require token
>> to be setup by kernel because user mode can do that by itself. However to
>> provide compatibility and portability with other architectues, user mode
>> can specify token set flag.
>>
>> Reviewed-by: Zong Li <zong.li@sifive.com>
>> Signed-off-by: Deepak Gupta <debug@rivosinc.com>
>> ---
>> arch/riscv/kernel/Makefile | 1 +
>> arch/riscv/kernel/usercfi.c | 144 ++++++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 145 insertions(+)
>>
>> diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
>> index 8d186bfced45..3a861d320654 100644
>> --- a/arch/riscv/kernel/Makefile
>> +++ b/arch/riscv/kernel/Makefile
>> @@ -125,3 +125,4 @@ obj-$(CONFIG_ACPI) += acpi.o
>> obj-$(CONFIG_ACPI_NUMA) += acpi_numa.o
>>
>> obj-$(CONFIG_GENERIC_CPU_VULNERABILITIES) += bugs.o
>> +obj-$(CONFIG_RISCV_USER_CFI) += usercfi.o
>> diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c
>> new file mode 100644
>> index 000000000000..24022809a7b5
>> --- /dev/null
>> +++ b/arch/riscv/kernel/usercfi.c
>> @@ -0,0 +1,144 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (C) 2024 Rivos, Inc.
>> + * Deepak Gupta <debug@rivosinc.com>
>> + */
>> +
>> +#include <linux/sched.h>
>> +#include <linux/bitops.h>
>> +#include <linux/types.h>
>> +#include <linux/mm.h>
>> +#include <linux/mman.h>
>> +#include <linux/uaccess.h>
>> +#include <linux/sizes.h>
>> +#include <linux/user.h>
>> +#include <linux/syscalls.h>
>> +#include <linux/prctl.h>
>> +#include <asm/csr.h>
>> +#include <asm/usercfi.h>
>> +
>> +#define SHSTK_ENTRY_SIZE sizeof(void *)
>> +
>> +/*
>> + * Writes on shadow stack can either be `sspush` or `ssamoswap`. `sspush` can happen
>> + * implicitly on current shadow stack pointed to by CSR_SSP. `ssamoswap` takes pointer to
>> + * shadow stack. To keep it simple, we plan to use `ssamoswap` to perform writes on shadow
>> + * stack.
>> + */
>> +static noinline unsigned long amo_user_shstk(unsigned long *addr, unsigned long val)
>> +{
>> + /*
>> + * Never expect -1 on shadow stack. Expect return addresses and zero
>> + */
>> + unsigned long swap = -1;
>> +
>> + __enable_user_access();
>> + asm goto(
>> + ".option push\n"
>> + ".option arch, +zicfiss\n"
>> + "1: ssamoswap.d %[swap], %[val], %[addr]\n"
>
>Hi Deepak,
>It just came to my mind, do we need to ensure that menvcfg.SSE is not
>zero before executing the ssamoswap instruction? Since ssamoswap is
>not encoded using MOP, I’m wondering if we should make sure that
>executing ssamoswap won’t accidentally trigger an illegal instruction
>exception. Thanks.
FWFT patches turn SSE during early boot. There is a bug there though,
I need to check if those FWFT SBI call succeeded or not. If it failed
then itshould set a global variable indicating shadow stack can't be
turned on. And in that case this flow wouldn't be reachable. Soon I
will post v13 with these changes.
Thanks for noticing.
>
>> + _ASM_EXTABLE(1b, %l[fault])
>> + RISCV_ACQUIRE_BARRIER
>> + ".option pop\n"
>> + : [swap] "=r" (swap), [addr] "+A" (*addr)
>> + : [val] "r" (val)
>> + : "memory"
>> + : fault
>> + );
>> + __disable_user_access();
>> + return swap;
>> +fault:
>> + __disable_user_access();
>> + return -1;
>> +}
>> +
>> +/*
>> + * Create a restore token on the shadow stack. A token is always XLEN wide
>> + * and aligned to XLEN.
>> + */
>> +static int create_rstor_token(unsigned long ssp, unsigned long *token_addr)
>> +{
>> + unsigned long addr;
>> +
>> + /* Token must be aligned */
>> + if (!IS_ALIGNED(ssp, SHSTK_ENTRY_SIZE))
>> + return -EINVAL;
>> +
>> + /* On RISC-V we're constructing token to be function of address itself */
>> + addr = ssp - SHSTK_ENTRY_SIZE;
>> +
>> + if (amo_user_shstk((unsigned long __user *)addr, (unsigned long)ssp) == -1)
>> + return -EFAULT;
>> +
>> + if (token_addr)
>> + *token_addr = addr;
>> +
>> + return 0;
>> +}
>> +
>> +static unsigned long allocate_shadow_stack(unsigned long addr, unsigned long size,
>> + unsigned long token_offset, bool set_tok)
>> +{
>> + int flags = MAP_ANONYMOUS | MAP_PRIVATE;
>> + struct mm_struct *mm = current->mm;
>> + unsigned long populate, tok_loc = 0;
>> +
>> + if (addr)
>> + flags |= MAP_FIXED_NOREPLACE;
>> +
>> + mmap_write_lock(mm);
>> + addr = do_mmap(NULL, addr, size, PROT_READ, flags,
>> + VM_SHADOW_STACK | VM_WRITE, 0, &populate, NULL);
>> + mmap_write_unlock(mm);
>> +
>> + if (!set_tok || IS_ERR_VALUE(addr))
>> + goto out;
>> +
>> + if (create_rstor_token(addr + token_offset, &tok_loc)) {
>> + vm_munmap(addr, size);
>> + return -EINVAL;
>> + }
>> +
>> + addr = tok_loc;
>> +
>> +out:
>> + return addr;
>> +}
>> +
>> +SYSCALL_DEFINE3(map_shadow_stack, unsigned long, addr, unsigned long, size, unsigned int, flags)
>> +{
>> + bool set_tok = flags & SHADOW_STACK_SET_TOKEN;
>> + unsigned long aligned_size = 0;
>> +
>> + if (!cpu_supports_shadow_stack())
>> + return -EOPNOTSUPP;
>> +
>> + /* Anything other than set token should result in invalid param */
>> + if (flags & ~SHADOW_STACK_SET_TOKEN)
>> + return -EINVAL;
>> +
>> + /*
>> + * Unlike other architectures, on RISC-V, SSP pointer is held in CSR_SSP and is available
>> + * CSR in all modes. CSR accesses are performed using 12bit index programmed in instruction
>> + * itself. This provides static property on register programming and writes to CSR can't
>> + * be unintentional from programmer's perspective. As long as programmer has guarded areas
>> + * which perform writes to CSR_SSP properly, shadow stack pivoting is not possible. Since
>> + * CSR_SSP is writeable by user mode, it itself can setup a shadow stack token subsequent
>> + * to allocation. Although in order to provide portablity with other architecture (because
>> + * `map_shadow_stack` is arch agnostic syscall), RISC-V will follow expectation of a token
>> + * flag in flags and if provided in flags, setup a token at the base.
>> + */
>> +
>> + /* If there isn't space for a token */
>> + if (set_tok && size < SHSTK_ENTRY_SIZE)
>> + return -ENOSPC;
>> +
>> + if (addr && (addr & (PAGE_SIZE - 1)))
>> + return -EINVAL;
>> +
>> + aligned_size = PAGE_ALIGN(size);
>> + if (aligned_size < size)
>> + return -EOVERFLOW;
>> +
>> + return allocate_shadow_stack(addr, aligned_size, size, set_tok);
>> +}
>>
>> --
>> 2.34.1
>>
next prev parent reply other threads:[~2025-04-09 14:19 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-14 21:39 [PATCH v12 00/28] riscv control-flow integrity for usermode Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 01/28] mm: VM_SHADOW_STACK definition for riscv Deepak Gupta
2025-04-07 15:45 ` Alexandre Ghiti
2025-03-14 21:39 ` [PATCH v12 02/28] dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml) Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 03/28] riscv: zicfiss / zicfilp enumeration Deepak Gupta
2025-04-07 15:48 ` Alexandre Ghiti
2025-04-09 14:43 ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 04/28] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 05/28] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2025-04-08 8:05 ` Alexandre Ghiti
2025-04-10 11:04 ` Radim Krčmář
2025-04-24 0:00 ` Deepak Gupta
2025-04-24 11:52 ` Radim Krčmář
2025-04-24 17:56 ` Deepak Gupta
2025-04-25 11:27 ` Radim Krčmář
2025-04-24 0:23 ` Deepak Gupta
2025-04-24 12:16 ` Radim Krčmář
2025-04-24 18:03 ` Deepak Gupta
2025-04-25 11:32 ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 06/28] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2025-04-08 10:39 ` Alexandre Ghiti
2025-04-10 10:03 ` Radim Krčmář
2025-04-24 0:45 ` Deepak Gupta
2025-04-24 12:23 ` Radim Krčmář
2025-04-24 12:43 ` Arnd Bergmann
2025-03-14 21:39 ` [PATCH v12 07/28] riscv mm: manufacture shadow stack pte Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 08/28] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 09/28] riscv mmu: write protect and shadow stack Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 10/28] riscv/mm: Implement map_shadow_stack() syscall Deepak Gupta
2025-04-07 4:50 ` Zong Li
2025-04-09 14:19 ` Deepak Gupta [this message]
2025-04-10 9:56 ` Radim Krčmář
2025-04-24 3:16 ` Deepak Gupta
2025-04-24 12:51 ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 11/28] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2025-04-08 10:51 ` Alexandre Ghiti
2025-04-09 14:31 ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 12/28] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2025-03-17 1:29 ` Zong Li
2025-04-10 9:45 ` Radim Krčmář
2025-04-24 4:44 ` Deepak Gupta
2025-04-24 13:36 ` Radim Krčmář
2025-04-24 18:16 ` Deepak Gupta
2025-04-25 11:42 ` Radim Krčmář
2025-04-25 16:39 ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 13/28] prctl: arch-agnostic prctl for indirect branch tracking Deepak Gupta
2025-03-17 1:29 ` Zong Li
2025-04-09 8:03 ` Alexandre Ghiti
2025-04-09 14:26 ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 14/28] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta
2025-03-17 1:29 ` Zong Li
2025-03-14 21:39 ` [PATCH v12 15/28] riscv/traps: Introduce software check exception Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 16/28] riscv: signal: abstract header saving for setup_sigcontext Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 17/28] riscv/signal: save and restore of shadow stack for signal Deepak Gupta
2025-04-10 8:49 ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 18/28] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 19/28] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2025-03-20 22:24 ` Radim Krčmář
2025-03-20 23:09 ` Deepak Gupta
2025-03-21 7:22 ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 20/28] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 21/28] riscv: Add Firmware Feature SBI extensions definitions Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 22/28] riscv: enable kernel access to shadow stack memory via FWFT sbi call Deepak Gupta
2025-03-20 22:10 ` Radim Krčmář
2025-03-20 22:42 ` Deepak Gupta
2025-03-21 7:35 ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 23/28] riscv: kernel command line option to opt out of user cfi Deepak Gupta
2025-03-20 21:35 ` Radim Krčmář
2025-03-20 22:31 ` Deepak Gupta
2025-03-21 7:31 ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 24/28] arch/riscv: compile vdso with landing pad Deepak Gupta
2025-04-08 12:45 ` Alexandre Ghiti
2025-04-09 14:28 ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 25/28] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2025-03-20 21:25 ` Radim Krčmář
2025-03-20 22:29 ` Deepak Gupta
2025-03-21 7:51 ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 26/28] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2025-04-08 8:36 ` Alexandre Ghiti
2025-03-14 21:39 ` [PATCH v12 27/28] riscv: Documentation for shadow stack on riscv Deepak Gupta
2025-04-08 8:48 ` Alexandre Ghiti
2025-04-10 5:24 ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 28/28] kselftest/riscv: kselftest for user mode cfi Deepak Gupta
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