From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3B1AC3DA6E for ; Wed, 3 Jan 2024 18:05:49 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id D8F7F6B03BB; Wed, 3 Jan 2024 13:05:48 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id D3FC06B03BC; Wed, 3 Jan 2024 13:05:48 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id C07976B03BD; Wed, 3 Jan 2024 13:05:48 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id ACCFC6B03BB for ; Wed, 3 Jan 2024 13:05:48 -0500 (EST) Received: from smtpin07.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay06.hostedemail.com (Postfix) with ESMTP id 85ECAA1D48 for ; Wed, 3 Jan 2024 18:05:35 +0000 (UTC) X-FDA: 81638777430.07.3D25D17 Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by imf04.hostedemail.com (Postfix) with ESMTP id 596B740025 for ; Wed, 3 Jan 2024 18:05:32 +0000 (UTC) Authentication-Results: imf04.hostedemail.com; dkim=none; dmarc=fail reason="SPF not aligned (relaxed), No valid DKIM" header.from=arm.com (policy=none); spf=pass (imf04.hostedemail.com: domain of cmarinas@kernel.org designates 145.40.73.55 as permitted sender) smtp.mailfrom=cmarinas@kernel.org ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1704305133; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zQsYD+uD2GIm+ypQPxsSniZM3Q+27NYZFWRCX0vZfAI=; b=hdyXuIhhgZ2kAJL810DNEVnbIxcAV8YF6VLT9t/85Y1HD/VVCcWJoZg8hsp0oeBxehVx0I s2CieoqqRwF66sL/FO6SRlEnsBJNsDUhEKb9vVBf6vZtvxmEDBKXJGt8J+i6ljCM0LBiJB ScE7qsM7kpevKyAqiqPqRDy5H7KCm9k= ARC-Authentication-Results: i=1; imf04.hostedemail.com; dkim=none; dmarc=fail reason="SPF not aligned (relaxed), No valid DKIM" header.from=arm.com (policy=none); spf=pass (imf04.hostedemail.com: domain of cmarinas@kernel.org designates 145.40.73.55 as permitted sender) smtp.mailfrom=cmarinas@kernel.org ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1704305133; a=rsa-sha256; cv=none; b=bqbQrW39oQ+CBpP7fw1DOWts6pkp49VQXX04KNpy3xMHAnJoRVJcOEniqkdpNrYwdPJ+aS uerjYlf0iu2+PCw4289W0+G1TIqFK+Cnpmhm6dZgKR9oQpveKwZ2HhllbiiDB3fLtZksmB oIvLvqPpd1M0Rc0PkpVaO6cZouaYlv0= Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 384CFCE1776; Wed, 3 Jan 2024 18:05:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7DBDAC433C7; Wed, 3 Jan 2024 18:05:24 +0000 (UTC) Date: Wed, 3 Jan 2024 18:05:21 +0000 From: Catalin Marinas To: Jisheng Zhang Cc: Will Deacon , "Aneesh Kumar K . V" , Andrew Morton , Nick Piggin , Peter Zijlstra , Paul Walmsley , Palmer Dabbelt , Albert Ou , Arnd Bergmann , linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Nadav Amit , Andrea Arcangeli , Andy Lutomirski , Dave Hansen , Thomas Gleixner , Yu Zhao , x86@kernel.org Subject: Re: [PATCH 1/2] mm/tlb: fix fullmm semantics Message-ID: References: <20231228084642.1765-1-jszhang@kernel.org> <20231228084642.1765-2-jszhang@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231228084642.1765-2-jszhang@kernel.org> X-Rspamd-Queue-Id: 596B740025 X-Rspam-User: X-Rspamd-Server: rspam02 X-Stat-Signature: rmrehbbfemo1rodicqq743qcbepf5tgt X-HE-Tag: 1704305132-239938 X-HE-Meta: U2FsdGVkX1/dBscrUG2SY3Be8ngf6bQqRQMNnFv7rm+qLJU70wsyQ74aDKDmmuQLwrwNz7UdzyfsP5N1cg1O+BCQ7g8qlcXwm5uv86gvAQWjkk1od0E41K8mbSFjRTchjOcLIe5Qai4Rt8nSeF0I7yRANJ2I4v0DIYclHmfTccNTNzrl16rSF6zCRpktRLa1We48bD508kA7FRKVpnlTdys/IW21lGiUcTMB//bN6mBjxUhy+/Ih5ytDeXetwE8HqvR0LE4mMEsrYH1svTkeXCbHFeyjenXBMfFKaCDfLTsJgnvKOtkAAjL88yFg01i0iH3gxf2rtITswy8Ow3vXgHYV324PhBQZmzdzC0QxG+PIlANMwpAdW2HmGrDZNyzdALT9B2QV2tFzR4sIxOnDbkUmw7KNyXS6/+oEpVOvEYdvUFmWtw/v1zRGJPdRSEVYufmVUloJTNwtE3S5BmhDqUVKTrZeCc27RZc72SkfHAWUCEJ5iK7u2joKDpKyqCnc52WyDRLah+80viYeDFHfm4knCNgEJEyUSIoTfXm9jfOBh2ftqnSU1lRSCYfRCrOHTXvvcs6akVabgnqF63RRPw126+LfYOfSoilSN2jWm7rD9PZODOTf47VqeJWetEBYIRMAbwxYr8Gas3lgQ2PoHKteMAwtHiILerCB2CUk2WmC9VivvhcofzKEdpQ5K5IVQwbGf0ClFADE1P8M9yZbiGUJzkI+44S/oXs/wVUXQeqxveXJu1QAoKtJD0slm/ySMyoub8VJlm1hllbLa4CyqWwCXtTXaUeHnIPKPRJyxyGwV3SInqeIbCHNsUPZzOqdUtCTMB+HXmMOdZ84EMARCEX7fz9vj45TB6SgXWokfFp9oAjjMag9HoQUKfpUmVcoqOTyO06+W8Ruq28wy8qnBgcNx/MHTXKZX9YGpusc2G2v7LqV31rUCnT7O7GTQiD6k6vWrujlq8g5g/Yr3kj 9Oh0NKP3 QdHcgQ8nXBOIWHMX6WlUXEsXTNeBORzYsQbfhjLQEZxfGh7rxOcuTgqpyXQ4PZdPGZhR+PEOoxN/FKKp8ZTVGevkqDw+hwue4jdGV+jQNJtnzQM0yG0Axy2B+67nP4jagVDb3SQWLKQdXHP2GSdT2lMlojJqY1BneGNcdm3AZcxjjdFMkG3pvNLrucWunu4rfkHbXKfShaHXiMgbBv8msc+ajwTHxvXb8Q02MFvu5VwZri3iQ5Q6Yi4GHaquicodad05m6nRiDYHS6xqWzu2Bq9Blrhr3j6y2aOlf2QCpcKoaxAbXBQoZ3gVjHQ5nXOxGv/E8 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Thu, Dec 28, 2023 at 04:46:41PM +0800, Jisheng Zhang wrote: > diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h > index 846c563689a8..6164c5f3b78f 100644 > --- a/arch/arm64/include/asm/tlb.h > +++ b/arch/arm64/include/asm/tlb.h > @@ -62,7 +62,10 @@ static inline void tlb_flush(struct mmu_gather *tlb) > * invalidating the walk-cache, since the ASID allocator won't > * reallocate our ASID without invalidating the entire TLB. > */ > - if (tlb->fullmm) { > + if (tlb->fullmm) > + return; > + > + if (tlb->need_flush_all) { > if (!last_level) > flush_tlb_mm(tlb->mm); > return; I don't think that's correct. IIRC, commit f270ab88fdf2 ("arm64: tlb: Adjust stride and type of TLBI according to mmu_gather") explicitly added the !last_level check to invalidate the walk cache (correspondence between the VA and the page table page rather than the full VA->PA translation). > diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h > index 129a3a759976..f2d46357bcbb 100644 > --- a/include/asm-generic/tlb.h > +++ b/include/asm-generic/tlb.h > @@ -452,7 +452,7 @@ static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) > * these bits. > */ > if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds || > - tlb->cleared_puds || tlb->cleared_p4ds)) > + tlb->cleared_puds || tlb->cleared_p4ds || tlb->need_flush_all)) > return; > > tlb_flush(tlb); > diff --git a/mm/mmu_gather.c b/mm/mmu_gather.c > index 4f559f4ddd21..79298bac3481 100644 > --- a/mm/mmu_gather.c > +++ b/mm/mmu_gather.c > @@ -384,7 +384,7 @@ void tlb_finish_mmu(struct mmu_gather *tlb) > * On x86 non-fullmm doesn't yield significant difference > * against fullmm. > */ > - tlb->fullmm = 1; > + tlb->need_flush_all = 1; > __tlb_reset_range(tlb); > tlb->freed_tables = 1; > } The optimisation here was added about a year later in commit 7a30df49f63a ("mm: mmu_gather: remove __tlb_reset_range() for force flush"). Do we still need to keep freed_tables = 1 here? I'd say only __tlb_reset_range(). -- Catalin