From: Alison Schofield <alison.schofield@intel.com>
To: shiju.jose@huawei.com
Cc: linux-cxl@vger.kernel.org, dan.j.williams@intel.com,
dave@stgolabs.net, jonathan.cameron@huawei.com,
dave.jiang@intel.com, vishal.l.verma@intel.com,
ira.weiny@intel.com, david@redhat.com, Vilas.Sridharan@amd.com,
linux-edac@vger.kernel.org, linux-acpi@vger.kernel.org,
linux-mm@kvack.org, linux-kernel@vger.kernel.org, bp@alien8.de,
tony.luck@intel.com, rafael@kernel.org, lenb@kernel.org,
mchehab@kernel.org, leo.duran@amd.com, Yazen.Ghannam@amd.com,
rientjes@google.com, jiaqiyan@google.com, Jon.Grimm@amd.com,
dave.hansen@linux.intel.com, naoya.horiguchi@nec.com,
james.morse@arm.com, jthoughton@google.com,
somasundaram.a@hpe.com, erdemaktas@google.com, pgonda@google.com,
duenwen@google.com, gthelen@google.com,
wschwartz@amperecomputing.com, dferguson@amperecomputing.com,
wbs@os.amperecomputing.com, nifan.cxl@gmail.com,
tanxiaofei@huawei.com, prime.zeng@hisilicon.com,
roberto.sassu@huawei.com, kangkang.shen@futurewei.com,
wanghuiqiang@huawei.com, linuxarm@huawei.com
Subject: Re: [PATCH 2/8] cxl/memfeature: Add CXL memory device patrol scrub control feature
Date: Fri, 7 Mar 2025 11:53:18 -0800 [thread overview]
Message-ID: <Z8tOrqOnkv-ZUsEy@aschofie-mobl2.lan> (raw)
In-Reply-To: <20250227223816.2036-3-shiju.jose@huawei.com>
On Thu, Feb 27, 2025 at 10:38:09PM +0000, shiju.jose@huawei.com wrote:
> From: Shiju Jose <shiju.jose@huawei.com>
snip
>
> +static int cxl_ps_get_attrs(struct cxl_patrol_scrub_context *cxl_ps_ctx,
> + struct cxl_memdev_ps_params *params)
> +{
> + struct cxl_mailbox *cxl_mbox;
> + struct cxl_memdev *cxlmd;
> + u16 min_scrub_cycle = 0;
> + int i, ret;
> +
> + if (cxl_ps_ctx->cxlr) {
> + struct cxl_region *cxlr = cxl_ps_ctx->cxlr;
> + struct cxl_region_params *p = &cxlr->params;
> +
> + ret = cxl_hold_region_and_dpa();
> + if (ret)
> + return ret;
> + for (i = p->interleave_ways - 1; i >= 0; i--) {
> + struct cxl_endpoint_decoder *cxled = p->targets[i];
> +
Hi Shiju,
Although not functionally wrong, the above for loop caught my eye.
p->nr_targets is a better loop initializer when walking p->targets[]
(at this point nr_targets better equal interleave ways but lets use
the count intended for the array being walked)
Is there a reason to walk in reverse? This seems clearer:
for (i = 0; i < p->nr_targets; i++)
The same for loop header repeats below in:
cxl_ps_set_attrs()
cxl_region_scrub_init()
If you change for one, change for all.
snip
> +static int cxl_memdev_scrub_init(struct cxl_memdev *cxlmd,
> + struct edac_dev_feature *ras_feature, u8 scrub_inst)
> +{
> + struct cxl_patrol_scrub_context *cxl_ps_ctx;
> + struct cxl_feat_entry *feat_entry;
> +
> + feat_entry = cxl_get_feature_entry(cxlmd->cxlds, &CXL_FEAT_PATROL_SCRUB_UUID);
> + if (IS_ERR(feat_entry))
> + return -EOPNOTSUPP;
> +
Along w patch 1 comment, perhaps just check for (!feat_entry) here
and in a couple of other places below.
snip
>
next prev parent reply other threads:[~2025-03-07 19:53 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-27 22:38 [PATCH 0/8] cxl: support CXL memory RAS features shiju.jose
2025-02-27 22:38 ` [PATCH 1/8] cxl: Add helper function to retrieve a feature entry shiju.jose
2025-03-07 0:55 ` Jonathan Cameron
2025-03-07 1:58 ` Fan Ni
2025-03-07 19:19 ` Alison Schofield
2025-03-10 18:15 ` Shiju Jose
2025-03-10 20:28 ` Alison Schofield
2025-03-11 9:51 ` Shiju Jose
2025-02-27 22:38 ` [PATCH 2/8] cxl/memfeature: Add CXL memory device patrol scrub control feature shiju.jose
2025-03-07 1:39 ` Dan Williams
2025-03-07 19:53 ` Alison Schofield [this message]
2025-02-27 22:38 ` [PATCH 3/8] cxl/memfeature: Add CXL memory device ECS " shiju.jose
2025-03-07 1:01 ` Jonathan Cameron
2025-03-07 2:46 ` Fan Ni
2025-03-08 1:48 ` Alison Schofield
2025-02-27 22:38 ` [PATCH 4/8] cxl/mbox: Add support for PERFORM_MAINTENANCE mailbox command shiju.jose
2025-02-27 22:38 ` [PATCH 5/8] cxl/region: Add helper function to determine memory is online shiju.jose
2025-03-07 22:01 ` Alison Schofield
2025-02-27 22:38 ` [PATCH 6/8] cxl: Support for finding memory operation attributes from the current boot shiju.jose
2025-03-08 2:09 ` Alison Schofield
2025-02-27 22:38 ` [PATCH 7/8] cxl/memfeature: Add CXL memory device soft PPR control feature shiju.jose
2025-03-07 1:04 ` Jonathan Cameron
2025-02-27 22:38 ` [PATCH 8/8] cxl/memfeature: Add CXL memory device memory sparing " shiju.jose
2025-03-07 1:11 ` Jonathan Cameron
2025-03-07 23:32 ` Alison Schofield
2025-03-08 2:35 ` Alison Schofield
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Z8tOrqOnkv-ZUsEy@aschofie-mobl2.lan \
--to=alison.schofield@intel.com \
--cc=Jon.Grimm@amd.com \
--cc=Vilas.Sridharan@amd.com \
--cc=Yazen.Ghannam@amd.com \
--cc=bp@alien8.de \
--cc=dan.j.williams@intel.com \
--cc=dave.hansen@linux.intel.com \
--cc=dave.jiang@intel.com \
--cc=dave@stgolabs.net \
--cc=david@redhat.com \
--cc=dferguson@amperecomputing.com \
--cc=duenwen@google.com \
--cc=erdemaktas@google.com \
--cc=gthelen@google.com \
--cc=ira.weiny@intel.com \
--cc=james.morse@arm.com \
--cc=jiaqiyan@google.com \
--cc=jonathan.cameron@huawei.com \
--cc=jthoughton@google.com \
--cc=kangkang.shen@futurewei.com \
--cc=lenb@kernel.org \
--cc=leo.duran@amd.com \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-cxl@vger.kernel.org \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=linuxarm@huawei.com \
--cc=mchehab@kernel.org \
--cc=naoya.horiguchi@nec.com \
--cc=nifan.cxl@gmail.com \
--cc=pgonda@google.com \
--cc=prime.zeng@hisilicon.com \
--cc=rafael@kernel.org \
--cc=rientjes@google.com \
--cc=roberto.sassu@huawei.com \
--cc=shiju.jose@huawei.com \
--cc=somasundaram.a@hpe.com \
--cc=tanxiaofei@huawei.com \
--cc=tony.luck@intel.com \
--cc=vishal.l.verma@intel.com \
--cc=wanghuiqiang@huawei.com \
--cc=wbs@os.amperecomputing.com \
--cc=wschwartz@amperecomputing.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox