From: Catalin Marinas <catalin.marinas@arm.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: linux-cxl@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
james.morse@arm.com, conor@kernel.org,
Yicong Yang <yangyicong@huawei.com>,
linux-acpi@vger.kernel.org, linux-arch@vger.kernel.org,
linuxarm@huawei.com, Yushan Wang <wangyushan12@huawei.com>,
linux-mm@kvack.org, gregkh@linuxfoundation.org,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will@kernel.org>,
Dan Williams <dan.j.williams@intel.com>
Subject: Re: [RFC PATCH 2/6] arm64: Support ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
Date: Fri, 28 Mar 2025 18:22:36 +0000 [thread overview]
Message-ID: <Z-bo7AQ1h6VQr65V@arm.com> (raw)
In-Reply-To: <20250320174118.39173-3-Jonathan.Cameron@huawei.com>
On Thu, Mar 20, 2025 at 05:41:14PM +0000, Jonathan Cameron wrote:
> +struct system_cache_flush_method {
> + int (*invalidate_memregion)(int res_desc,
> + phys_addr_t start, size_t len);
> +};
[...]
> +int cpu_cache_invalidate_memregion(int res_desc, phys_addr_t start, size_t len)
> +{
> + guard(spinlock_irqsave)(&scfm_lock);
> + if (!scfm_data)
> + return -EOPNOTSUPP;
> +
> + return scfm_data->invalidate_memregion(res_desc, start, len);
> +}
WBINVD on x86 deals with the CPU caches as well. Even the API naming in
Linux implies CPU caches. IIUC, devices registering to the above on Arm
SoCs can only deal with system caches. Is it sufficient?
--
Catalin
next prev parent reply other threads:[~2025-03-28 18:22 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-20 17:41 [RFC PATCH 0/6] Cache coherency management subsystem Jonathan Cameron
2025-03-20 17:41 ` [RFC PATCH 1/6] memregion: Support fine grained invalidate by cpu_cache_invalidate_memregion() Jonathan Cameron
2025-03-20 17:41 ` [RFC PATCH 2/6] arm64: Support ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION Jonathan Cameron
2025-03-28 18:22 ` Catalin Marinas [this message]
2025-03-29 7:14 ` Yicong Yang
2025-06-13 17:14 ` Jonathan Cameron
2025-03-20 17:41 ` [RFC PATCH 3/6] cache: coherency device class Jonathan Cameron
2025-03-20 21:12 ` Greg KH
2025-03-21 9:38 ` Jonathan Cameron
2025-03-20 17:41 ` [RFC PATCH 4/6] cache: Support cache maintenance for HiSilicon SoC Hydra Home Agent Jonathan Cameron
2025-03-20 17:41 ` [RFC PATCH 5/6] acpi: PoC of Cache control via ACPI0019 and _DSM Jonathan Cameron
2025-03-20 17:41 ` [RFC PATCH 6/6] Hack: Pretend we have PSCI 1.2 Jonathan Cameron
2025-03-21 22:32 ` [RFC PATCH 0/6] Cache coherency management subsystem Conor Dooley
2025-03-24 12:00 ` Jonathan Cameron
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