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U2FsdGVkX1+Gn6broStk0VDAZ2/iU6oC8LIQUFlx/Nl719rloujVUqlw+hYD1NJ3ceTbmMHUwlObsFuarhjhabkZabY56wxspqakAj4Ok0MSHVz1WtKjMSTKXuTVuNkDtMQmWpmDbcrVKZE79eMIBOQPPVYynvBV2jyGEIoalzGB/5RVow8fCd1cL71DQJ8lXmpJbQpDgWYTICWNvdMyBVjd0aBHnE1yktwIaHEOAcZ1aQoY1k5eq7lKSFkgtgQ8J5+8H3RATRJx3t3NXzzpaY8LVsOFVIyPhq1zzh0q5M+uwfpAsQ7NE+HFAZlAalg8OeitOHaskndBw6A23w6fw+0AVyafbQf5uRyM0GsNoWeWXkwRD4cSAeAMHBjY4XVvqj3ti03Nf6/AZbt+g1PDZW+csryzYAj/UEapdO7C3ILl9D99T8fQ/7dxgC6EP0Jnr4huuzXaQ1H41oJrEulSS9+ZQh9Gvx+4c10WLFh7cRueiGFqUGEvwyd4srJc8DlVEmT8phW7b2oWOhOSDqXMwy2njkxiGHTDguJoJxx1WaOGVyoI31fSouic93TQs2ibLtgmCV3Eo3Nw6Ue5+fiZUgip4QehURKFzGYhhggpvNV6/I6Bt3Uz2fnZbxT4d9U1YG4b1h4W9UaxuvQhFDTcmRjutjEBtLprboQRwhCYJXkwhLaD2oTQdrEoLja+3LCXU8JfDDvIkMnytXNd4fU27sNMjcmBy/mJC2es3NjF0uCnoU85l8lvNyrQY4TJrs39zd5V5xLeSj7/oQi1IChQG1oZod8Gz5m1ELhagDYlcOuarniazZCKvFmDc3sjPp/drXH4qpscrMvFZaJkFXLu2ZgQOGENQv19rtr4lWxj6pf+T6pJKwu5WVbSchYrk0Zzw64rlOJDLc74xiMAZvocEaBDr2RAf/syqM6a3Rvu/FPu2n/fwfRT0WxYG5Q7O1HYiOy1bbZQMGVtc5xeU8A BJjLNurQ NaSnUfAche//h6dRu8jV0/+MP+wRjC1R3m9oy8yLj8BstBe6qR2khVMU8RxcBbCK6ZMiu9tvMHYoXhL6XPIL6ki6knX4ZiNQOfoS31HnweRDI2JFCZV8PJa8YXd+t4FuyukyS9GE4N1D94NLv3y06PvgCCrL45yd4pEhoNyhUiGvkhCkQCz+5IwuOsbpjoq5JNjuag3P5Z78qyO4dYJCl2RNbhDcMtmnl5lklmjHpLHT7mx8EhjyVUNYLoZpbse9IYiQaC/62KV87daDChO2Eifk38XS84PxSn4GtrjVAwBjLLPMkHYwA5EyLaS+9h/fu9HLMHs/kmyTLg/XV4Nxu57oVkq2k/Xhs4x/bUotjW9duRdb/HF9ABYRP7KjO8Edu0fGf8UdtIFg931KzQLPjj/sk8OAV9LqDIzZ3F+rVHI5pqbdYD1IO0ATjLv2y0v2yhlfSHabR4jBy8w+ARdOGi7nOYdExpiJpbQzacl9pauvr6CqO/Nie49JmNnM99OwE5rv8Oce8mUulgPMTDJVLh58v15Eu8O1LxWG2yWELFBziNoI9TmG2B1rK1u49GVMWfz3ib7Up+c/lNYzdqBsLP6pbBXlPMr/KKu575WVsYfnTT4Z/W8/RM56IEQjtZgHqhMaLdUFadDp7x6A+iigX2f4BE4hYn0KwnzFK X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Fri, Mar 28, 2025 at 04:41:05PM +0000, John Ernberg wrote: > On 6/12/23 5:31 PM, Catalin Marinas wrote: > > Hi, > > > > That's v7 of the series reducing the kmalloc() minimum alignment on > > arm64 to 8 (from 128). There's no new/different functionality, mostly > > cosmetic changes and acks/tested-bys. > > > > Andrew, if there are no further comments or objections to this version, > > are you ok to take the series through the mm tree? The arm64 changes are > > fairly small. Alternatively, I can push it into linux-next now to give > > it some wider exposure and decide whether to upstream it when the > > merging window opens. Thanks. > > > > The updated patches are also available on this branch: > > > > git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux devel/kmalloc-minalign > > > > (I trimmed the recipients and added linux-usb and imx mailing list, + > cdns3 maintainers) > > Hi Catalin, lists, > > Seen on Linux 6.12.20, it is not trivial for us to test later kernels so > if the issue is potentially fixed we are more than happy to cherry-pick > the potential fixes and give them a go. > > Having an SMSC9512 (smsc95xx) USB Ethernet/Hub chip attached to the armv8 > SoC iMX8QXP over the Cadence USB3 USB2 interface (cdns3-imx) will since > the patch set at [0] cause random interrupt storms over the SMSC9512 INT > EP. Do you know where buy SMSC9512 USB Ethernet/Hub? > > The reason for the storm is that the async URBs queued at [1] right before > the interrupt configuration [2] in the driver. > With [0] applied, those async URBs are likely clobbering any URB located > after them in memory somewhere in the xhci memory space. > The memory corruption only happens if there is more than one URB in the > queue at the same time, making these async URBs a good trigger of the > problem. > If we force those URBs to be sync or use the hack inlined below, the > problem goes away. > > The content of read_buf in the interrupt configuration read at [2] looks > to be the lo-part of a pointer +-20 bytes distance from the pointers > present in the async URBs queued from [1] when we dumped the URB structures > instead of the expected register contents. > > Attached are 3 usbmon captures, with some annotations, which we thought > might contain useful hints. > > * usb-annotated-bad.pcapng shows the URB that will get clobbered is queued > at position 280, and completes at 282. > > * usb-annotated-good.pcapng shows the URB that gets clobbered in the bad > case is queued at position 282 and completes at 283. > > The above captures are from a kernel where the hack has not been applied. > > * usb-annotated-hackfix.pcapng shows the URB that gets clobbered in the > bad case is queued at position 238 and completes at 240. Maillist have not attachment. Can you send it to me directly? Frank > > This was captured after the hack fix inlined below was applied. > > We have no reason to believe [0] is actually causing this, but rather > the improvements uncovered a pre-existing issue with the Cadence 3 > integration in the iMX8QXP, as otherwise USB would be some level of broken > for absolutely everyone on ARM64 since 2+ years. > > The reason we did not notice the issue earlier is that until very recently > we have been stuck on the NXP vendoring of 6.1 which pre-dates [0]. > > We determined [0] uncovers the breakage by replacing the host/ and cdns3/ > code with the NXP 6.1 vendor kernel code in a Frankenstein fashion and > still ending up with the same USB breakage. > > Running KASAN on this doesn't trigger anything, so it's not a KASAN > detectable issue. > > Our knowledge on how to progress on debugging this has unfortunately come > to an end. We'd deeply appreciate any suggestion or possible patches to > test. > > Best regards // John Ernberg > > [0]: > https://lore.kernel.org/linux-mm/20230612153201.554742-1-catalin.marinas@arm.com/ > [1]: > https://elixir.bootlin.com/linux/v6.12.19/source/drivers/net/usb/smsc95xx.c#L525 > [2]: > https://elixir.bootlin.com/linux/v6.12.19/source/drivers/net/usb/smsc95xx.c#L1045 > > ------------------->8----------- > diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h > index 06a4670bdb0b..7356801faa52 100644 > --- a/arch/arm64/include/asm/cache.h > +++ b/arch/arm64/include/asm/cache.h > @@ -33,7 +33,7 @@ > * the CPU. > */ > #define ARCH_DMA_MINALIGN (128) > -#define ARCH_KMALLOC_MINALIGN (8) > +#define ARCH_KMALLOC_MINALIGN (128) > > #ifndef __ASSEMBLY__