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Shutemov" Cc: "Kirill A. Shutemov" , Dave Hansen , Andy Lutomirski , x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org Subject: Re: [PATCHv6 04/11] x86/mm: Handle LAM on context switch Message-ID: References: <20220815041803.17954-1-kirill.shutemov@linux.intel.com> <20220815041803.17954-5-kirill.shutemov@linux.intel.com> <20220815173725.ph6ogtqneiqwqek7@box.shutemov.name> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220815173725.ph6ogtqneiqwqek7@box.shutemov.name> ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1660586550; a=rsa-sha256; cv=none; b=tfebK40YtSj40iCwKsttsk7cZy8ZgqOpXqdzXySjF2tHeuYjbcemC/1kg20NomWKCXUFOP uH/A045poLm32ZY6vu1FLjShYX+rgZYPmUz8GuQpXGJBymvZR+EjlxMEVJR6nMAtyVe+xU XRL1DH96LbSt1yHzerRBGaFblWev6Bc= ARC-Authentication-Results: i=1; imf07.hostedemail.com; dkim=pass header.d=infradead.org header.s=casper.20170209 header.b=V1qfXlrO; spf=none (imf07.hostedemail.com: domain of peterz@infradead.org has no SPF policy when checking 90.155.50.34) smtp.mailfrom=peterz@infradead.org; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1660586550; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=vIBK6gqGPEdsPWZL796FQ/Qaj+IzDk4kXPXl+Fjs5Qc=; b=ZbytU6pfMYs+eHiYQlbCAk4Ev8zc5iYNgxo9h1JxyJmIPhiewIiZZkBbDuUAdiuWLoGq5y GJJi0ttgo1dFUA1frwLAc5pSlkCRQumUoC9VlAG3BJ2BEx5OK2KVN5LHIA02OSG16pqc2Q l9mW5Dw3Mh3MTH3ulEzA0ZQjGIfHx3o= Authentication-Results: imf07.hostedemail.com; dkim=pass header.d=infradead.org header.s=casper.20170209 header.b=V1qfXlrO; spf=none (imf07.hostedemail.com: domain of peterz@infradead.org has no SPF policy when checking 90.155.50.34) smtp.mailfrom=peterz@infradead.org; dmarc=none X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: A7B33401BB X-Stat-Signature: thpkgpremeadmkn4ktwxy5y11e59doni X-Rspam-User: X-HE-Tag: 1660586549-470471 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Mon, Aug 15, 2022 at 08:37:25PM +0300, Kirill A. Shutemov wrote: > On Mon, Aug 15, 2022 at 03:42:25PM +0200, Peter Zijlstra wrote: > > On Mon, Aug 15, 2022 at 07:17:56AM +0300, Kirill A. Shutemov wrote: > > > diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c > > > index c1e31e9a85d7..fdc0b69b5da7 100644 > > > --- a/arch/x86/mm/tlb.c > > > +++ b/arch/x86/mm/tlb.c > > > @@ -154,17 +154,18 @@ static inline u16 user_pcid(u16 asid) > > > return ret; > > > } > > > > > > -static inline unsigned long build_cr3(pgd_t *pgd, u16 asid) > > > +static inline unsigned long build_cr3(pgd_t *pgd, u16 asid, unsigned long lam) > > > { > > > if (static_cpu_has(X86_FEATURE_PCID)) { > > > - return __sme_pa(pgd) | kern_pcid(asid); > > > + return __sme_pa(pgd) | kern_pcid(asid) | lam; > > > } else { > > > VM_WARN_ON_ONCE(asid != 0); > > > - return __sme_pa(pgd); > > > + return __sme_pa(pgd) | lam; > > > } > > > } > > > > > > -static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid) > > > +static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid, > > > + unsigned long lam) > > > { > > > VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); > > > /* > > > @@ -173,7 +174,7 @@ static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid) > > > * boot because all CPU's the have same capabilities: > > > */ > > > VM_WARN_ON_ONCE(!boot_cpu_has(X86_FEATURE_PCID)); > > > - return __sme_pa(pgd) | kern_pcid(asid) | CR3_NOFLUSH; > > > + return __sme_pa(pgd) | kern_pcid(asid) | lam | CR3_NOFLUSH; > > > } > > > > Looking at this; I wonder if we want something like this: > > > > --- a/arch/x86/mm/tlb.c > > +++ b/arch/x86/mm/tlb.c > > @@ -157,6 +157,7 @@ static inline u16 user_pcid(u16 asid) > > static inline unsigned long build_cr3(pgd_t *pgd, u16 asid, unsigned long lam) > > { > > if (static_cpu_has(X86_FEATURE_PCID)) { > > + VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); > > return __sme_pa(pgd) | kern_pcid(asid) | lam; > > } else { > > VM_WARN_ON_ONCE(asid != 0); > > @@ -167,14 +168,13 @@ static inline unsigned long build_cr3(pg > > static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid, > > unsigned long lam) > > { > > - VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); > > /* > > * Use boot_cpu_has() instead of this_cpu_has() as this function > > * might be called during early boot. This should work even after > > * boot because all CPU's the have same capabilities: > > */ > > VM_WARN_ON_ONCE(!boot_cpu_has(X86_FEATURE_PCID)); > > - return __sme_pa(pgd) | kern_pcid(asid) | lam | CR3_NOFLUSH; > > + return build_cr3(pgd, asid, lam) | CR3_NOFLUSH; > > } > > Looks sane, but seems unrelated to the patch. Is it okay to fold it > anyway? Related in so far as that it reduces the number of sites where we have the actual CR3 'computation' (which is how I arrived at the thing). Arguably we could even do something like: static inline unsigned long build_cr3(pgd_t *pgd, u16 asid, unsigned long lam) { unsigned long cr3 = __sme_pa(pgd) | lam; if (static_cpu_has(X86_FEATURE_PCID)) { VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); cr |= kern_pcid(asid); } else { VM_WARN_ON_ONCE(asid != 0); } return cr3; } But perhaps that's pushing things a little. IMO fine to fold.