From: Catalin Marinas <catalin.marinas@arm.com>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Dave Hansen <dave.hansen@intel.com>,
Will Deacon <will@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
x86@kernel.org, Kostya Serebryany <kcc@google.com>,
Andrey Ryabinin <ryabinin.a.a@gmail.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Alexander Potapenko <glider@google.com>,
Dmitry Vyukov <dvyukov@google.com>,
"H . J . Lu" <hjl.tools@gmail.com>,
Andi Kleen <ak@linux.intel.com>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCHv3 7/8] x86: Expose untagging mask in /proc/$PID/arch_status
Date: Mon, 27 Jun 2022 13:00:54 +0100 [thread overview]
Message-ID: <Yrmb9gvd4KsIPy/b@arm.com> (raw)
In-Reply-To: <20220611012830.hs437yikbjgwlije@black.fi.intel.com>
Hi Kirill,
Sorry, this fell through the cracks (thanks to Will for reminding me).
On Sat, Jun 11, 2022 at 04:28:30AM +0300, Kirill A. Shutemov wrote:
> On Fri, Jun 10, 2022 at 08:24:38AM -0700, Dave Hansen wrote:
> > On 6/10/22 07:35, Kirill A. Shutemov wrote:
> > > +/*
> > > + * Report architecture specific information
> > > + */
> > > +int proc_pid_arch_status(struct seq_file *m, struct pid_namespace *ns,
> > > + struct pid *pid, struct task_struct *task)
> > > +{
> > > + /*
> > > + * Report AVX512 state if the processor and build option supported.
> > > + */
> > > + if (cpu_feature_enabled(X86_FEATURE_AVX512F))
> > > + avx512_status(m, task);
> > > +
> > > + seq_printf(m, "untag_mask:\t%#lx\n", mm_untag_mask(task->mm));
> > > +
> > > + return 0;
> > > +}
> >
> > Arch-specific gunk is great for, well, arch-specific stuff. AVX-512 and
> > its, um, "quirks", really won't show up anywhere else. But x86 isn't
> > even the first to be doing this address tagging business.
> >
> > Shouldn't we be talking to the ARM folks about a common way to do this?
>
> + Catalin, Will.
>
> I guess we can expose the mask via proc for ARM too, but I'm not sure if
> we can unify interface further without breaking existing TBI users: TBI is
> enabled per-thread while LAM is per-process.
Hardware TBI is enabled for all user space at boot (it was like this
form the beginning). The TBI syscall interface is per-thread (TIF flag)
but it doesn't change any hardware behaviour. The mask is fixed in
hardware, unchangeable. I'm fine with reporting an untag_mask in a
common way, only that setting it won't be possible on arm64.
If arm64 ever gains support for a modifiable untag_mask, it's a good
chance it would be per mm as well since the controls for TBI are per
page table.
--
Catalin
next prev parent reply other threads:[~2022-06-27 12:01 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-10 14:35 [PATCHv3 0/8] Linear Address Masking enabling Kirill A. Shutemov
2022-06-10 14:35 ` [PATCHv3 1/8] x86/mm: Fix CR3_ADDR_MASK Kirill A. Shutemov
2022-06-10 23:32 ` Edgecombe, Rick P
2022-06-10 14:35 ` [PATCHv3 2/8] x86: CPUID and CR3/CR4 flags for Linear Address Masking Kirill A. Shutemov
2022-06-10 14:35 ` [PATCHv3 3/8] mm: Pass down mm_struct to untagged_addr() Kirill A. Shutemov
2022-06-10 23:33 ` Edgecombe, Rick P
2022-06-17 15:27 ` Alexander Potapenko
2022-06-17 22:38 ` Kirill A. Shutemov
2022-06-10 14:35 ` [PATCHv3 4/8] x86/mm: Handle LAM on context switch Kirill A. Shutemov
2022-06-10 23:55 ` Edgecombe, Rick P
2022-06-15 15:54 ` Kirill A. Shutemov
2022-06-16 9:08 ` Peter Zijlstra
2022-06-16 16:40 ` Kirill A. Shutemov
2022-06-17 15:35 ` Alexander Potapenko
2022-06-17 22:39 ` Kirill A. Shutemov
2022-06-28 23:33 ` Andy Lutomirski
2022-06-29 0:34 ` Kirill A. Shutemov
2022-06-30 1:51 ` Andy Lutomirski
2022-06-10 14:35 ` [PATCHv3 5/8] x86/uaccess: Provide untagged_addr() and remove tags before address check Kirill A. Shutemov
2022-06-13 17:36 ` Edgecombe, Rick P
2022-06-15 16:58 ` Kirill A. Shutemov
2022-06-15 19:06 ` Edgecombe, Rick P
2022-06-16 9:30 ` Peter Zijlstra
2022-06-16 16:44 ` Kirill A. Shutemov
2022-06-17 11:36 ` Peter Zijlstra
2022-06-17 14:22 ` H.J. Lu
2022-06-17 14:28 ` Peter Zijlstra
2022-06-16 9:34 ` Peter Zijlstra
2022-06-16 10:02 ` Peter Zijlstra
2022-06-16 16:48 ` Kirill A. Shutemov
2022-06-28 23:40 ` Andy Lutomirski
2022-06-29 0:42 ` Kirill A. Shutemov
2022-06-30 2:38 ` Andy Lutomirski
2022-07-05 0:13 ` Kirill A. Shutemov
2022-06-10 14:35 ` [PATCHv3 6/8] x86/mm: Provide ARCH_GET_UNTAG_MASK and ARCH_ENABLE_TAGGED_ADDR Kirill A. Shutemov
2022-06-10 15:25 ` Edgecombe, Rick P
2022-06-10 18:04 ` Kirill A. Shutemov
2022-06-10 16:16 ` Edgecombe, Rick P
2022-06-10 18:06 ` Kirill A. Shutemov
2022-06-10 18:08 ` Edgecombe, Rick P
2022-06-10 22:18 ` Edgecombe, Rick P
2022-06-11 1:12 ` Kirill A. Shutemov
2022-06-11 2:36 ` Edgecombe, Rick P
2022-06-12 21:03 ` Andy Lutomirski
2022-06-16 9:44 ` Peter Zijlstra
2022-06-16 16:54 ` Kirill A. Shutemov
2022-06-30 2:04 ` Andy Lutomirski
2022-06-13 14:42 ` Michal Hocko
2022-06-16 17:05 ` Kirill A. Shutemov
2022-06-19 23:40 ` Kirill A. Shutemov
2022-06-16 9:39 ` Peter Zijlstra
2022-06-28 23:42 ` Andy Lutomirski
2022-06-29 0:53 ` Kirill A. Shutemov
2022-06-30 2:29 ` Andy Lutomirski
2022-07-01 15:38 ` Kirill A. Shutemov
2022-07-02 23:55 ` Andy Lutomirski
2022-07-04 13:43 ` Kirill A. Shutemov
2022-06-10 14:35 ` [PATCHv3 7/8] x86: Expose untagging mask in /proc/$PID/arch_status Kirill A. Shutemov
2022-06-10 15:24 ` Dave Hansen
2022-06-11 1:28 ` Kirill A. Shutemov
2022-06-27 12:00 ` Catalin Marinas [this message]
2022-06-10 14:35 ` [PATCHv3 OPTIONAL 8/8] x86/mm: Extend LAM to support to LAM_U48 Kirill A. Shutemov
2022-06-16 10:00 ` Peter Zijlstra
2022-06-10 20:22 ` [PATCHv3 0/8] Linear Address Masking enabling Kostya Serebryany
2022-06-16 22:52 ` Edgecombe, Rick P
2022-06-16 23:43 ` Kirill A. Shutemov
2022-06-16 23:48 ` Edgecombe, Rick P
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