From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF77DC4338F for ; Mon, 9 Aug 2021 16:46:16 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 670C160EBB for ; Mon, 9 Aug 2021 16:46:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 670C160EBB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=alien8.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvack.org Received: by kanga.kvack.org (Postfix) id C3D9E6B006C; Mon, 9 Aug 2021 12:46:15 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id BEC9E6B0071; Mon, 9 Aug 2021 12:46:15 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id ADB378D0001; Mon, 9 Aug 2021 12:46:15 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0068.hostedemail.com [216.40.44.68]) by kanga.kvack.org (Postfix) with ESMTP id 9815C6B006C for ; Mon, 9 Aug 2021 12:46:15 -0400 (EDT) Received: from smtpin01.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay04.hostedemail.com (Postfix) with ESMTP id 40DF71C94B for ; Mon, 9 Aug 2021 16:46:15 +0000 (UTC) X-FDA: 78456119910.01.B13FD9E Received: from mail.skyhub.de (mail.skyhub.de [5.9.137.197]) by imf14.hostedemail.com (Postfix) with ESMTP id DC4A76001E4A for ; Mon, 9 Aug 2021 16:46:06 +0000 (UTC) Received: from zn.tnic (p200300ec2f26f300329c23fffea6a903.dip0.t-ipconnect.de [IPv6:2003:ec:2f26:f300:329c:23ff:fea6:a903]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 83DB51EC0464; Mon, 9 Aug 2021 18:46:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1628527561; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=XUOqf8vqF/dog7RebfDNzatspRq8VZL8GzGgGP6c24Q=; b=YFl6VNfrMwgbU+encJCbFTp5uVXnTZhWTKeoZRrz8sHdCYD50Km7numnyXlX6tcSSf2Lmc XE+GvgRwFHo3EHlF0dj7g/Prgxv5ehPMlHHNwrjWNlBlqB/+dR7XzK3Bdm9C2YzzKmfS2u Kw5HjQAZ9hceYx5fy61aD1cYtAdjKRg= Date: Mon, 9 Aug 2021 18:46:45 +0200 From: Borislav Petkov To: Yu-cheng Yu Cc: x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang , Pengfei Xu , Haitao Huang , Rick P Edgecombe Subject: Re: [PATCH v28 05/32] x86/fpu/xstate: Introduce CET MSR and XSAVES supervisor states Message-ID: References: <20210722205219.7934-1-yu-cheng.yu@intel.com> <20210722205219.7934-6-yu-cheng.yu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20210722205219.7934-6-yu-cheng.yu@intel.com> X-Rspamd-Server: rspam03 X-Rspamd-Queue-Id: DC4A76001E4A Authentication-Results: imf14.hostedemail.com; dkim=pass header.d=alien8.de header.s=dkim header.b=YFl6VNfr; dmarc=temperror reason="query timed out" header.from=alien8.de (policy=temperror); spf=pass (imf14.hostedemail.com: domain of bp@alien8.de designates 5.9.137.197 as permitted sender) smtp.mailfrom=bp@alien8.de X-Stat-Signature: coybqytj7mrrn7p4hou6u1jcuyw8ictj X-HE-Tag: 1628527566-856968 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Thu, Jul 22, 2021 at 01:51:52PM -0700, Yu-cheng Yu wrote: > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index a7c413432b33..b529f42ddaae 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -939,4 +939,23 @@ > #define MSR_VM_IGNNE 0xc0010115 > #define MSR_VM_HSAVE_PA 0xc0010117 > > +/* Control-flow Enforcement Technology MSRs */ > +#define MSR_IA32_U_CET 0x000006a0 /* user mode cet setting */ > +#define MSR_IA32_S_CET 0x000006a2 /* kernel mode cet setting */ > +#define CET_SHSTK_EN BIT_ULL(0) > +#define CET_WRSS_EN BIT_ULL(1) > +#define CET_ENDBR_EN BIT_ULL(2) > +#define CET_LEG_IW_EN BIT_ULL(3) > +#define CET_NO_TRACK_EN BIT_ULL(4) > +#define CET_SUPPRESS_DISABLE BIT_ULL(5) > +#define CET_RESERVED (BIT_ULL(6) | BIT_ULL(7) | BIT_ULL(8) | BIT_ULL(9)) > +#define CET_SUPPRESS BIT_ULL(10) > +#define CET_WAIT_ENDBR BIT_ULL(11) > + > +#define MSR_IA32_PL0_SSP 0x000006a4 /* kernel shadow stack pointer */ > +#define MSR_IA32_PL1_SSP 0x000006a5 /* ring-1 shadow stack pointer */ > +#define MSR_IA32_PL2_SSP 0x000006a6 /* ring-2 shadow stack pointer */ > +#define MSR_IA32_PL3_SSP 0x000006a7 /* user shadow stack pointer */ > +#define MSR_IA32_INT_SSP_TAB 0x000006a8 /* exception shadow stack table */ > + > #endif /* _ASM_X86_MSR_INDEX_H */ Merge the following hunk ontop of yours pls: diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index b529f42ddaae..14ce136bcfa8 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -362,6 +362,26 @@ #define MSR_CORE_PERF_LIMIT_REASONS 0x00000690 + +/* Control-flow Enforcement Technology MSRs */ +#define MSR_IA32_U_CET 0x000006a0 /* user mode cet setting */ +#define MSR_IA32_S_CET 0x000006a2 /* kernel mode cet setting */ +#define CET_SHSTK_EN BIT_ULL(0) +#define CET_WRSS_EN BIT_ULL(1) +#define CET_ENDBR_EN BIT_ULL(2) +#define CET_LEG_IW_EN BIT_ULL(3) +#define CET_NO_TRACK_EN BIT_ULL(4) +#define CET_SUPPRESS_DISABLE BIT_ULL(5) +#define CET_RESERVED (BIT_ULL(6) | BIT_ULL(7) | BIT_ULL(8) | BIT_ULL(9)) +#define CET_SUPPRESS BIT_ULL(10) +#define CET_WAIT_ENDBR BIT_ULL(11) + +#define MSR_IA32_PL0_SSP 0x000006a4 /* kernel shadow stack pointer */ +#define MSR_IA32_PL1_SSP 0x000006a5 /* ring-1 shadow stack pointer */ +#define MSR_IA32_PL2_SSP 0x000006a6 /* ring-2 shadow stack pointer */ +#define MSR_IA32_PL3_SSP 0x000006a7 /* user shadow stack pointer */ +#define MSR_IA32_INT_SSP_TAB 0x000006a8 /* exception shadow stack table */ + #define MSR_GFX_PERF_LIMIT_REASONS 0x000006B0 #define MSR_RING_PERF_LIMIT_REASONS 0x000006B1 @@ -939,23 +959,4 @@ #define MSR_VM_IGNNE 0xc0010115 #define MSR_VM_HSAVE_PA 0xc0010117 -/* Control-flow Enforcement Technology MSRs */ -#define MSR_IA32_U_CET 0x000006a0 /* user mode cet setting */ -#define MSR_IA32_S_CET 0x000006a2 /* kernel mode cet setting */ -#define CET_SHSTK_EN BIT_ULL(0) -#define CET_WRSS_EN BIT_ULL(1) -#define CET_ENDBR_EN BIT_ULL(2) -#define CET_LEG_IW_EN BIT_ULL(3) -#define CET_NO_TRACK_EN BIT_ULL(4) -#define CET_SUPPRESS_DISABLE BIT_ULL(5) -#define CET_RESERVED (BIT_ULL(6) | BIT_ULL(7) | BIT_ULL(8) | BIT_ULL(9)) -#define CET_SUPPRESS BIT_ULL(10) -#define CET_WAIT_ENDBR BIT_ULL(11) - -#define MSR_IA32_PL0_SSP 0x000006a4 /* kernel shadow stack pointer */ -#define MSR_IA32_PL1_SSP 0x000006a5 /* ring-1 shadow stack pointer */ -#define MSR_IA32_PL2_SSP 0x000006a6 /* ring-2 shadow stack pointer */ -#define MSR_IA32_PL3_SSP 0x000006a7 /* user shadow stack pointer */ -#define MSR_IA32_INT_SSP_TAB 0x000006a8 /* exception shadow stack table */ - #endif /* _ASM_X86_MSR_INDEX_H */ -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette