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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id r29sm7413174pfq.102.2021.07.15.11.56.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jul 2021 11:56:40 -0700 (PDT) Date: Thu, 15 Jul 2021 18:56:36 +0000 From: Sean Christopherson To: Dave Hansen Cc: Peter Gonda , Brijesh Singh , x86@kernel.org, linux-kernel@vger.kernel.org, kvm list , linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Borislav Petkov , Michael Roth , Vlastimil Babka , tony.luck@intel.com, Nathaniel McCallum , brijesh.ksingh@gmail.com Subject: Re: [PATCH Part2 RFC v4 06/40] x86/sev: Add helper functions for RMPUPDATE and PSMASH instruction Message-ID: References: <20210707183616.5620-1-brijesh.singh@amd.com> <20210707183616.5620-7-brijesh.singh@amd.com> <8ab309cd-8465-d543-55c8-5f6529fe74fd@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8ab309cd-8465-d543-55c8-5f6529fe74fd@intel.com> Authentication-Results: imf30.hostedemail.com; dkim=pass header.d=google.com header.s=20161025 header.b=PEYSJW5y; spf=pass (imf30.hostedemail.com: domain of seanjc@google.com designates 209.85.210.172 as permitted sender) smtp.mailfrom=seanjc@google.com; dmarc=pass (policy=reject) header.from=google.com X-Rspamd-Server: rspam03 X-Rspamd-Queue-Id: 3B25AE0019A8 X-Stat-Signature: we83aun9tpracdthdppnbut6z6gdwty9 X-HE-Tag: 1626375402-630394 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Mon, Jul 12, 2021, Dave Hansen wrote: > On 7/12/21 11:44 AM, Peter Gonda wrote: > >> +int psmash(struct page *page) > >> +{ > >> + unsigned long spa = page_to_pfn(page) << PAGE_SHIFT; > >> + int ret; > >> + > >> + if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP)) > >> + return -ENXIO; > >> + > >> + /* Retry if another processor is modifying the RMP entry. */ > >> + do { > >> + /* Binutils version 2.36 supports the PSMASH mnemonic. */ > >> + asm volatile(".byte 0xF3, 0x0F, 0x01, 0xFF" > >> + : "=a"(ret) > >> + : "a"(spa) > >> + : "memory", "cc"); > >> + } while (ret == FAIL_INUSE); > > Should there be some retry limit here for safety? Or do we know that > > we'll never be stuck in this loop? Ditto for the loop in rmpupdate. > > It's probably fine to just leave this. While you could *theoretically* > lose this race forever, it's unlikely to happen in practice. If it > does, you'll get an easy-to-understand softlockup backtrace which should > point here pretty quickly. But should failure here even be tolerated? The TDX cases spin on flows that are _not_ due to (direct) contenion, e.g. a pending interrupt while flushing the cache or lack of randomness when generating a key. In this case, there are two CPUs racing to modify the RMP entry, which implies that the final state of the RMP entry is not deterministic. > I think TDX has a few of these as well. Most of the "SEAMCALL"s from > host to the firmware doing the security enforcement have something like > an -EBUSY as well. I believe they just retry forever too.