From: Matthew Wilcox <willy@infradead.org>
To: Dave Hansen <dave.hansen@intel.com>
Cc: lsf-pc@lists.linux-foundation.org, linux-mm@kvack.org, "Shutemov,
Kirill" <kirill.shutemov@intel.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>
Subject: Re: [LSF/MM TOPIC] Impact on core mm from new hardware features
Date: Tue, 22 Jun 2021 16:00:31 +0100 [thread overview]
Message-ID: <YNH7D/igT2MEetfa@casper.infradead.org> (raw)
In-Reply-To: <51d3010b-6324-2441-42c0-27bb536c897d@intel.com>
On Tue, Jun 22, 2021 at 07:55:48AM -0700, Dave Hansen wrote:
> There should be enough x86 folks around, but I'd love to hear from the
> ARM and powerpc people as well.
Possibly also s390. eg f28d43636d6f seems very similar to one of the
things Intel wants.
> Here are a few mostly Intel-specific things I'd like to discuss.
> However, all of these either have analogs on other architectures or are
> implemented by other x86 vendors.
>
> * Shadow Stacks - requires new Copy-on-Read memory type. Creates
> application mappings which are effectively PROT_NONE, but which are
> implicitly accessible by the hardware.
> * Linear Address Masking (LAM) - Similar to ARM's Top Byte Ignore
> (TBI). Repurpose some virtual address bits to store metadata. Intel
> implementation can sacrifice user address space. Offloads some of
> the work the compiler does in ASAN implementations.
> * Supervisor Protection Keys - Extends Memory Protection Keys (pkeys)
> to kernel mappings.
> * TDX - VMs that don't trust the hypervisor. Requires unmapping guest
> memory from userspace and possibly the host kernel.
next prev parent reply other threads:[~2021-06-22 15:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-22 14:55 Dave Hansen
2021-06-22 15:00 ` Matthew Wilcox [this message]
2021-06-22 16:19 ` [Lsf-pc] " Dan Williams
2021-06-25 11:38 ` Michael Ellerman
2021-06-25 22:34 ` Ira Weiny
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