From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CE02C433FE for ; Mon, 10 Oct 2022 07:06:03 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 79C5C6B0071; Mon, 10 Oct 2022 03:06:02 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 749E86B0073; Mon, 10 Oct 2022 03:06:02 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 6121C6B0074; Mon, 10 Oct 2022 03:06:02 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0017.hostedemail.com [216.40.44.17]) by kanga.kvack.org (Postfix) with ESMTP id 4CCBE6B0071 for ; Mon, 10 Oct 2022 03:06:02 -0400 (EDT) Received: from smtpin20.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay03.hostedemail.com (Postfix) with ESMTP id 1325EA0809 for ; Mon, 10 Oct 2022 07:06:02 +0000 (UTC) X-FDA: 80004155364.20.B619650 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by imf22.hostedemail.com (Postfix) with ESMTP id 4842BC0023 for ; Mon, 10 Oct 2022 07:06:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1665385562; x=1696921562; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=xROL4sSA0XHSScYeRuddHrQ4znydf0w9T1UCjqWke5I=; b=ASNykDi4SqjB2ABtYJlo/4fIiCd/n+uTTsYWUXqTJfoefdGnTSoZE/eA zE+nTpZfyCajxOxz6zidsD55jOoMuGGvVxnhWHpZUyGtujjlcF+ylTKYP 0G2Se+KO2LA2nBC3y4CexU2rq1F1OyFfexD1mshzqVciXpTAn0djdbCJf U8QfOYCC4GJFNfxRAT4MAhFO52gWfvGbPBLAt69txosbFeNn5vgncOMCf O01MwuGAakKCGvgTM845ZgDCKbgY+D5sxXHW5zY6Fes3ecZ4C6Qy7pNMk ZVsdd9GV1w7IW6IZWm64HCh05CQQFALs9q8KquGO5dX2fPInl8dOzAGXX w==; X-IronPort-AV: E=Sophos;i="5.95,173,1661842800"; d="scan'208";a="183997215" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 10 Oct 2022 00:06:00 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Mon, 10 Oct 2022 00:05:58 -0700 Received: from wendy (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12 via Frontend Transport; Mon, 10 Oct 2022 00:05:57 -0700 Date: Mon, 10 Oct 2022 08:05:35 +0100 From: Conor Dooley To: Andrew Jones CC: Vernon Yang , , , , , , Subject: Re: [PATCH] RISC-V: KVM: fixup undefined reference to riscv_cbom_block_size Message-ID: References: <202210091222.xuZquaM9-lkp@intel.com> <20221010013329.199167-1-vernon2gm@gmail.com> <20221010065949.is3kf54ctt2kdmjd@kamzik> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20221010065949.is3kf54ctt2kdmjd@kamzik> ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1665385561; a=rsa-sha256; cv=none; b=Ce+7+lBdKkQs1q0dpqrh0FirLcNlNYghKRwD7bZCCXuwi4xvn2JCJo4UZSp9TRirfj8HTY 3vAonz3tXWfaHETjUDtU0a5UliCSp+qgIDMhHXNnSZRgckvyhflWGbxc36WXbb38EQe5VV lQCB1UaBGXxxnSLy+0Zd2b7TxZal5IM= ARC-Authentication-Results: i=1; imf22.hostedemail.com; dkim=pass header.d=microchip.com header.s=mchp header.b=ASNykDi4; spf=pass (imf22.hostedemail.com: domain of Conor.Dooley@microchip.com designates 68.232.153.233 as permitted sender) smtp.mailfrom=Conor.Dooley@microchip.com; dmarc=pass (policy=quarantine) header.from=microchip.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1665385561; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=CfwUMcfvMejdhhmcmtHQfsrn+cY5vJaIwoub6zc/OvE=; b=gToBA7Ltg8tbrV1ae3dMDuK2tq2hs4xxnIiWb+iShu0DRb28OyWtSp1WJKLBugWs+pwnIU sv9rg6mBqH2efpDpcRZ+ujxRcY01U+hvj3rSawTXkQHL3eGu3iA8etRX8tMbklbWUmh9GE JWodtqWM0LmUkc9jl79rvkV6G18qykM= Authentication-Results: imf22.hostedemail.com; dkim=pass header.d=microchip.com header.s=mchp header.b=ASNykDi4; spf=pass (imf22.hostedemail.com: domain of Conor.Dooley@microchip.com designates 68.232.153.233 as permitted sender) smtp.mailfrom=Conor.Dooley@microchip.com; dmarc=pass (policy=quarantine) header.from=microchip.com X-Stat-Signature: fuo3poeq5gt5zz9wyhhhpzbdjmcwktbn X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 4842BC0023 X-Rspam-User: X-HE-Tag: 1665385561-50659 X-Bogosity: Ham, tests=bogofilter, spamicity=0.002795, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Mon, Oct 10, 2022 at 08:59:49AM +0200, Andrew Jones wrote: > On Mon, Oct 10, 2022 at 07:42:04AM +0100, Conor Dooley wrote: > > On Mon, Oct 10, 2022 at 09:33:29AM +0800, Vernon Yang wrote: > > > When some RISC-V compilers do not support the Zicbom extension, > > > the build system auto disable the CONFIG_RISCV_ISA_ZICBOM, so the > > > source code of the relevant function is not compiled, resulting > > > in the definition of the riscv_cbom_block_size variable cannot > > > be found > > > > Hmm, my understanding was that riscv_cbom_block_size was not supposed to > > depend on CONFIG_RISCV_ISA_ZICBOM because the thead is able to use it > > even if the toolchain does not support it. > > > > The code in cacheflush.h looks like: > > extern unsigned int riscv_cbom_block_size; > > #ifdef CONFIG_RISCV_ISA_ZICBOM > > void riscv_init_cbom_blocksize(void); > > #else > > static inline void riscv_init_cbom_blocksize(void) { } > > #endif > > > > #ifdef CONFIG_RISCV_DMA_NONCOHERENT > > void riscv_noncoherent_supported(void); > > #endif > > > > It's early and I only had a quick look but I think that this is not > > defined because RISCV_DMA_NONCOHERENT is not defined, not because of > > RISCV_ISA_ZICBOM. > > thead is able to use riscv_cbom_block_size because it does its own > initialization of it and selects RISCV_DMA_NONCOHERENT to get access > to it. KVM depends on the initializer in dma-noncoherent.c, which is > guarded by RISCV_ISA_ZICBOM and does not select RISCV_DMA_NONCOHERENT, > but RISCV_ISA_ZICBOM does. I think guarding use of riscv_cbom_block_size > with RISCV_ISA_ZICBOM in KVM makes sense. Aight chief, you know the code better than I do :) > > I'm not the KVM maintainer, but I dislike #ifdefery > > in c files, so it'd be nice I think to sort this out in the header and > > not have to worry about guarding the variable. > > I also dislike #ifdefery, but unless we move riscv_cbom_block_size to > an unconditionally built file like cacheflush.c (as Anup once did), then > we don't have much choice. Fair enough. Maybe once fixes, for-next & some of Heiko's cleanups have aligned it'll make sense to do such a change. Sorry for the noise then, Conor.