From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4438C433E0 for ; Wed, 6 Jan 2021 10:10:04 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 6F5512310D for ; Wed, 6 Jan 2021 10:10:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6F5512310D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id AEFD28D0100; Wed, 6 Jan 2021 05:10:03 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id A9F778D0090; Wed, 6 Jan 2021 05:10:03 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 9DD378D0100; Wed, 6 Jan 2021 05:10:03 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0037.hostedemail.com [216.40.44.37]) by kanga.kvack.org (Postfix) with ESMTP id 885678D0090 for ; Wed, 6 Jan 2021 05:10:03 -0500 (EST) Received: from smtpin09.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay03.hostedemail.com (Postfix) with ESMTP id 52BD0824556B for ; Wed, 6 Jan 2021 10:10:03 +0000 (UTC) X-FDA: 77674929486.09.lead46_0c102cc274e0 Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin09.hostedemail.com (Postfix) with ESMTP id 37BA9180AD815 for ; Wed, 6 Jan 2021 10:10:03 +0000 (UTC) X-HE-Tag: lead46_0c102cc274e0 X-Filterd-Recvd-Size: 5498 Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) by imf30.hostedemail.com (Postfix) with ESMTP for ; Wed, 6 Jan 2021 10:10:02 +0000 (UTC) Received: by mail-wm1-f41.google.com with SMTP id q75so2134702wme.2 for ; Wed, 06 Jan 2021 02:10:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=pYyg30QaTDPl/1SfAlH9RTsVh8+8mZmaYN21GkgmjzE=; b=dU+TthxcMGjTtNTHgAxVXU4RoesYX0+g99WP06hov8k5+rSF25PGYGQgv+pYLH9ckG cpOFnAM0PAAI7YejQrIJHu5grW+Yi0ZytOjyTDq/H1o74sD4vZRshf+L3csjqFLxW04I B1gNIOTJzvmEka1ljIVPJmu6F0U/alZBd99XxiQxOUphUvxWFEaAi8os+miAjfa1icSB 83os8+fz8W51CuiINLjCJmLG927DS2go5laF4PedUBdUlA1PKI1uIVChN1xY9eJjUpxV RSjEOgm+EiZVG/ijwACZGfwbxljK4OLRJoJucnkx1tAOEGGVIF9ylAwN+JLGXggtn/n+ UvNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=pYyg30QaTDPl/1SfAlH9RTsVh8+8mZmaYN21GkgmjzE=; b=FFJnIb8otsT0S0Ot5xf9x/nYWOHER34mhDIDRuYSdnZknaNfohcY6pmXuLnia7mZU0 KY7sJ5tYphx74JVTN8ik9UHH0u0dgCIwQCAJXl3S/fuoY+QImOtynbNFXfAjAYP55p3D Lj9OBGHJt6AmajAbGew/673kTPIfneTcImcbo9OG1pclyznVYHNmtupr6ZymKodvZiRD AuG1sj3xPoxG1ez6PxvdLqu1uiiAAoPsb2vwLsqadicI3U70WCfk6UtsqAyYmaZkaPZB HnA7SejqErmfQz0yv8r4Whq9Z4eU+3p1N1zlEQlFiBCZYfFtGMoKs3zGRy7WAeLP0CYW TfOw== X-Gm-Message-State: AOAM533J+FJ83nyPt0WBceaJ8hrlKqSBTaDU4CN4Lc2NpbTkMkvLr7Pw KVCCSkTQeI60Kn45yW08poT37g== X-Google-Smtp-Source: ABdhPJyYTgg3A5KVgYhik+U4iGyzXTzZ8PYLdEnALeRQjjVy1s7B3PnwykM8rNUrBWLGefy5aB2J7w== X-Received: by 2002:a1c:4c14:: with SMTP id z20mr3009430wmf.149.1609927801506; Wed, 06 Jan 2021 02:10:01 -0800 (PST) Received: from myrica ([2001:1715:4e26:a7e0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id r7sm2394874wmh.2.2021.01.06.02.10.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jan 2021 02:10:00 -0800 (PST) Date: Wed, 6 Jan 2021 11:09:42 +0100 From: Jean-Philippe Brucker To: Krishna Reddy Cc: "iommu@lists.linux-foundation.org" , "linux-arm-kernel@lists.infradead.org" , "linux-mm@kvack.org" , "fenghua.yu@intel.com" , "catalin.marinas@arm.com" , "robin.murphy@arm.com" , "zhangfei.gao@linaro.org" , "will@kernel.org" , Jason Gunthorpe , Alistair Popple , Vikram Sethi , Yu-Huan Hsu , Sachin Nikam , Terje Bergstrom , Pritesh Raithatha , Nate Watterson , Nicolin Chen Subject: Re: [PATCH v10 11/13] iommu/arm-smmu-v3: Add SVA device feature Message-ID: References: <20200918101852.582559-1-jean-philippe@linaro.org> <20200918101852.582559-12-jean-philippe@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi, On Tue, Dec 15, 2020 at 01:09:29AM +0000, Krishna Reddy wrote: > Hi Jean, > > > +bool arm_smmu_master_sva_supported(struct arm_smmu_master *master) { > > + if (!(master->smmu->features & ARM_SMMU_FEAT_SVA)) > > + return false; > + > > + /* SSID and IOPF support are mandatory for the moment */ > > + return master->ssid_bits && arm_smmu_iopf_supported(master); } > > + > > Tegra Next Gen SOC has arm-smmu-v3 and It doesn't have support for PRI interface. > However, PCIe client device has capability to handle the page faults on its own when the ATS translation fails. > The PCIe device needs SVA feature enable without PRI interface supported at arm-smmu-v3. > At present, the SVA feature enable is allowed only if the smmu/client device has PRI support. > There seem to be no functional reason to make pri_supported as a pre-requisite for SVA enable. The pri_supported check allows drivers to query whether the SMMU is compatible with their capability. It's pointless, for example, to enable SVA for a PRI-capable device if the SMMU doesn't support PRI. I agree that we should let a device driver enable SVA if it supports some form of IOPF. Perhaps we could extract the IOPF capability from IOMMU_DEV_FEAT_SVA, into a new IOMMU_DEV_FEAT_IOPF feature. Device drivers that rely on PRI or stall can first check FEAT_IOPF, then FEAT_SVA, and enable both separately. Enabling FEAT_SVA would require FEAT_IOPF enabled if supported. Let me try to write this up. Thanks, Jean > Can SVA enable be supported for pri_supported not set case as well? > Also, It is noticed that SVA enable on Intel doesn't need pri_supported set. > > -KR