From: Michael Kelley <mhklinux@outlook.com>
To: "riel@surriel.com" <riel@surriel.com>, "x86@kernel.org" <x86@kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"kernel-team@meta.com" <kernel-team@meta.com>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"luto@kernel.org" <luto@kernel.org>,
"peterz@infradead.org" <peterz@infradead.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"bp@alien8.de" <bp@alien8.de>, "hpa@zytor.com" <hpa@zytor.com>,
"akpm@linux-foundation.org" <akpm@linux-foundation.org>,
"linux-mm@kvack.org" <linux-mm@kvack.org>
Subject: RE: [RFC PATCH v2 00/11] AMD broadcast TLB invalidation
Date: Tue, 24 Dec 2024 18:08:40 +0000 [thread overview]
Message-ID: <SN6PR02MB41578C72F39DB1301C1D1970D4032@SN6PR02MB4157.namprd02.prod.outlook.com> (raw)
In-Reply-To: <20241223025751.3268975-1-riel@surriel.com>
From: riel@surriel.com <riel@surriel.com> Sent: Sunday, December 22, 2024 6:55 PM
>
> Add support for broadcast TLB invalidation using AMD's INVLPGB instruction.
> This allows the kernel to invalidate TLB entries on remote CPUs without
> needing to send IPIs, without having to wait for remote CPUs to handle
> those interrupts, and with less interruption to what was running on
> those CPUs.
>
> Because x86 PCID space is limited, and there are some very large
> systems out there, broadcast TLB invalidation is only used for
> processes that are active on 3 or more CPUs, with the threshold
> being gradually increased the more the PCID space gets exhausted.
Rik --
What is this patch set's expectation about INVLPGB and TLBSYNC
availability and usage in a VM? I see that INVLPGB and TLBYSNC
behavior in a VM is spec'ed in the AMD Programmer's Manual, but
I wonder about their impact in a multi-tenant host like in a public
cloud environment. And given what this patch set does in assigning
global ASIDs, should X86_FEATURE_INVLPGB be disabled if
running in a VM where the hypervisor for whatever reason has
enabled INVLPGB/TLBSYNC in its VMs?
My knowledge of the details here is pretty limited, so my
question may just reflect my ignorance. But it would be good
for the code comments and/or commit messages to include
explicit statements about what is expected in a VM.
Michael
>
> Combined with the removal of unnecessary lru_add_drain calls
> (see https://lkml.org/lkml/2024/12/19/1388) this results in a
> nice performance boost for the will-it-scale tlb_flush2_threads
> test on an AMD Milan system with 36 cores:
>
> - vanilla kernel: 527k loops/second
> - lru_add_drain removal: 731k loops/second
> - only INVLPGB: 527k loops/second
> - lru_add_drain + INVLPGB: 1157k loops/second
>
> Profiling with only the INVLPGB changes showed while
> TLB invalidation went down from 40% of the total CPU
> time to only around 4% of CPU time, the contention
> simply moved to the LRU lock.
>
> Fixing both at the same time about doubles the
> number of iterations per second from this case.
>
> v2:
> - Apply suggestions by Peter and Borislav (thank you!)
> - Fix bug in arch_tlbbatch_flush, where we need to do both
> the TLBSYNC, and flush the CPUs that are in the cpumask.
> - Some updates to comments and changelogs based on questions.
>
next prev parent reply other threads:[~2024-12-24 18:08 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-23 2:55 Rik van Riel
2024-12-23 2:55 ` [PATCH 01/11] x86/mm: make MMU_GATHER_RCU_TABLE_FREE unconditional Rik van Riel
2024-12-23 6:01 ` Qi Zheng
2024-12-23 20:20 ` Rik van Riel
2024-12-24 18:26 ` Peter Zijlstra
2024-12-23 2:55 ` [PATCH 02/11] x86/mm: add X86_FEATURE_INVLPGB definition Rik van Riel
2024-12-23 2:55 ` [PATCH 03/11] x86/mm: get INVLPGB count max from CPUID Rik van Riel
2024-12-25 23:42 ` Nadav Amit
2024-12-23 2:55 ` [PATCH 04/11] x86/mm: add INVLPGB support code Rik van Riel
2024-12-23 2:55 ` [PATCH 05/11] x86/mm: use INVLPGB for kernel TLB flushes Rik van Riel
2024-12-23 2:55 ` [PATCH 06/11] x86/tlb: use INVLPGB in flush_tlb_all Rik van Riel
2024-12-23 2:55 ` [PATCH 07/11] x86/mm: use broadcast TLB flushing for page reclaim TLB flushing Rik van Riel
2024-12-23 2:55 ` [PATCH 08/11] x86/mm: enable broadcast TLB invalidation for multi-threaded processes Rik van Riel
2024-12-25 23:22 ` Nadav Amit
2024-12-25 23:32 ` Nadav Amit
2024-12-23 2:55 ` [PATCH 09/11] x86,tlb: do targeted broadcast flushing from tlbbatch code Rik van Riel
2024-12-23 2:55 ` [PATCH 10/11] x86/mm: enable AMD translation cache extensions Rik van Riel
2024-12-23 2:55 ` [PATCH 11/11] x86/mm: only invalidate final translations with INVLPGB Rik van Riel
2024-12-24 18:08 ` Michael Kelley [this message]
2024-12-25 14:48 ` [RFC PATCH v2 00/11] AMD broadcast TLB invalidation Rik van Riel
2025-01-10 19:29 ` Tom Lendacky
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