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From: "Willgerodt, Felix" <felix.willgerodt@intel.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Vignesh Balasubramanian <vigbalas@amd.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-toolchains@vger.kernel.org"
	<linux-toolchains@vger.kernel.org>,
	"mpe@ellerman.id.au" <mpe@ellerman.id.au>,
	"npiggin@gmail.com" <npiggin@gmail.com>,
	"christophe.leroy@csgroup.eu" <christophe.leroy@csgroup.eu>,
	"aneesh.kumar@kernel.org" <aneesh.kumar@kernel.org>,
	"naveen.n.rao@linux.ibm.com" <naveen.n.rao@linux.ibm.com>,
	"ebiederm@xmission.com" <ebiederm@xmission.com>,
	"keescook@chromium.org" <keescook@chromium.org>,
	"x86@kernel.org" <x86@kernel.org>,
	"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
	"linux-mm@kvack.org" <linux-mm@kvack.org>,
	"jinisusan.george@amd.com" <jinisusan.george@amd.com>,
	"matz@suse.de" <matz@suse.de>,
	"binutils@sourceware.org" <binutils@sourceware.org>,
	"jhb@FreeBSD.org" <jhb@freebsd.org>
Subject: RE: [PATCH 0/1] Add XSAVE layout description to Core files for debuggers to support varying XSAVE layouts
Date: Fri, 15 Mar 2024 08:43:29 +0000	[thread overview]
Message-ID: <MN2PR11MB4566300360E97CCA874ACE8B8E282@MN2PR11MB4566.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20240314163345.GBZfMm6Ve5QMY_xPjl@fat_crate.local>

> -----Original Message-----
> From: Borislav Petkov <bp@alien8.de>
> Sent: Donnerstag, 14. März 2024 17:34
> To: Willgerodt, Felix <felix.willgerodt@intel.com>
> Cc: Vignesh Balasubramanian <vigbalas@amd.com>; linux-
> kernel@vger.kernel.org; linux-toolchains@vger.kernel.org;
> mpe@ellerman.id.au; npiggin@gmail.com; christophe.leroy@csgroup.eu;
> aneesh.kumar@kernel.org; naveen.n.rao@linux.ibm.com;
> ebiederm@xmission.com; keescook@chromium.org; x86@kernel.org;
> linuxppc-dev@lists.ozlabs.org; linux-mm@kvack.org;
> jinisusan.george@amd.com; matz@suse.de; binutils@sourceware.org;
> jhb@FreeBSD.org
> Subject: Re: [PATCH 0/1] Add XSAVE layout description to Core files for
> debuggers to support varying XSAVE layouts
> 
> On Thu, Mar 14, 2024 at 04:25:44PM +0000, Willgerodt, Felix wrote:
> > I am wondering if it wouldn't be easier for everyone if corefiles would just
> > contain space for all possible XSAVE components?
> 
> You mean we should shuffle out from the kernel 8K of AMX state even if
> nothing uses it or the machine doesn't even support it?
> 
> That's silly.

I don't think it is so silly ;) Let me elaborate.

I was mostly trying to suggest an "easy fix" for the MPX issue.
I also said that we could drop features from the end of the list if the CPU
doesn't support them. Yes it is still wasteful, but kind of was the status quo
in the past afaik. And yes, if new states come after AMX it could get more wasteful.

Though in another email here Dave said that the offsets in XSAVE
are "fixed in practice". That makes me wonder. Even if we add CPUID to corefiles,
will Intel CPUs benefit? (I am not saying it isn't worth changing even if Intel CPUs don't.)
E.g. will we actually get rid of the 8k that you are complaining about?
I don't know the answer to be honest. If XSAVE offsets are "fixed in practice",
I don't see how we would benefit.

And how would you check that "nothing uses AMX", if the state exist according
to CPUID?

> Please have a look at this:
> 
> +struct xfeat_component {
> +       u32 xfeat_type;
> +       u32 xfeat_sz;
> +       u32 xfeat_off;
> +       u32 xfeat_flags;
> +} __packed;
> 
> What is wrong with having a blob of such xfeat_component things
> describing the XSTATE buffer and parsing it in gdb?

I didn't say it is wrong or that I am opposing it. In fact CPUID in
corefiles could be useful for other scenarios as well.
Though all consumers will need to add to their implementation.
I assume LLDB and GDB aren't the only consumers.

Felix
Intel Deutschland GmbH
Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de>
Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva  
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928

      reply	other threads:[~2024-03-15  8:43 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-14 11:23 Vignesh Balasubramanian
2024-03-14 11:23 ` [PATCH 1/1] x86/elf: Add a new .note section containing Xfeatures information to x86 core files Vignesh Balasubramanian
2024-03-14 15:37   ` Dave Hansen
2024-03-14 16:08     ` Borislav Petkov
2024-03-14 16:19       ` Dave Hansen
2024-03-14 16:29         ` Borislav Petkov
2024-03-14 16:39           ` Dave Hansen
2024-03-26  9:59             ` Balasubrmanian, Vignesh
2024-03-15 23:51           ` Thomas Gleixner
2024-03-16 10:29             ` Borislav Petkov
2024-03-14 16:45     ` John Baldwin
2024-03-14 17:10       ` Dave Hansen
2024-03-14 17:36         ` John Baldwin
2024-03-14 17:05     ` John Baldwin
2024-03-14 16:13   ` Kees Cook
2024-03-26 10:06     ` Balasubrmanian, Vignesh
2024-03-14 22:13   ` Michael Ellerman
2024-03-26 10:09     ` Balasubrmanian, Vignesh
2024-03-15  9:59   ` kernel test robot
2024-03-15 12:59   ` kernel test robot
2024-03-14 16:25 ` [PATCH 0/1] Add XSAVE layout description to Core files for debuggers to support varying XSAVE layouts Willgerodt, Felix
2024-03-14 16:33   ` Borislav Petkov
2024-03-15  8:43     ` Willgerodt, Felix [this message]

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