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([2601:646:c200:1ef2:4d0d:5741:f5e3:172]) by smtp.gmail.com with ESMTPSA id z23sm658756pfj.143.2021.01.11.14.11.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Jan 2021 14:11:58 -0800 (PST) Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Andy Lutomirski Mime-Version: 1.0 (1.0) Subject: Re: [PATCH v2 1/3] x86/mce: Avoid infinite loop for copy from user recovery Date: Mon, 11 Jan 2021 14:11:56 -0800 Message-Id: References: <20210111214452.1826-2-tony.luck@intel.com> Cc: Borislav Petkov , x86@kernel.org, Andrew Morton , Peter Zijlstra , Darren Hart , Andy Lutomirski , linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, linux-mm@kvack.org In-Reply-To: <20210111214452.1826-2-tony.luck@intel.com> To: Tony Luck X-Mailer: iPhone Mail (18B121) X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: > On Jan 11, 2021, at 1:45 PM, Tony Luck wrote: >=20 > =EF=BB=BFRecovery action when get_user() triggers a machine check uses the= fixup > path to make get_user() return -EFAULT. Also queue_task_work() sets up > so that kill_me_maybe() will be called on return to user mode to send a > SIGBUS to the current process. >=20 > But there are places in the kernel where the code assumes that this > EFAULT return was simply because of a page fault. The code takes some > action to fix that, and then retries the access. This results in a second > machine check. >=20 > While processing this second machine check queue_task_work() is called > again. But since this uses the same callback_head structure that > was used in the first call, the net result is an entry on the > current->task_works list that points to itself. Is this happening in pagefault_disable context or normal sleepable fault con= text? If the latter, maybe we should reconsider finding a way for the machi= ne check code to do its work inline instead of deferring it. Yes, I realize this is messy, but maybe it=E2=80=99s not that messy. Concept= ually, we just (famous last words) need to arrange for an MCE with IF=3D1 to= switch off the IST stack and run like a normal exception.=