From: Nadav Amit <nadav.amit@gmail.com>
To: Andy Lutomirski <luto@kernel.org>
Cc: X86 ML <x86@kernel.org>, Borislav Petkov <bpetkov@suse.de>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
Mel Gorman <mgorman@suse.de>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
Rik van Riel <riel@redhat.com>
Subject: Re: [RFC 04/11] x86/mm: Track the TLB's tlb_gen and update the flushing algorithm
Date: Mon, 5 Jun 2017 22:03:23 -0700 [thread overview]
Message-ID: <E1A42E76-A583-490F-9667-37A5CB4005E2@gmail.com> (raw)
In-Reply-To: <fa028af2168f71ab55522eb19b320c167ba4678d.1496701658.git.luto@kernel.org>
Maybe it’s me, but I find it rather hard to figure out whether
flush_tlb_func_common() is safe, since it can be re-entered - if a local TLB
flush is performed, and during this local flush a remote shootdown IPI is
received.
Did I miss irq being disabled during the local flush?
Otherwise, it raises the question whether flush_tlb_func_common() changes were
designed with re-entry in mind. Regarding it in the comments would really be
helpful.
Anyhow, I suspect that at least the following warning can be triggered:
WARN_ON_ONCE(local_tlb_gen > mm_tlb_gen);
> static void flush_tlb_func_common(const struct flush_tlb_info *f,
> bool local, enum tlb_flush_reason reason)
> {
> + struct mm_struct *loaded_mm = this_cpu_read(cpu_tlbstate.loaded_mm);
> +
> + /*
> + * Our memory ordering requirement is that any TLB fills that
> + * happen after we flush the TLB are ordered after we read
> + * active_mm's tlb_gen. We don't need any explicit barrier
> + * because all x86 flush operations are serializing and the
> + * atomic64_read operation won't be reordered by the compiler.
> + */
> + u64 mm_tlb_gen = atomic64_read(&loaded_mm->context.tlb_gen);
If for example a shootdown IPI can be delivered here...
> + u64 local_tlb_gen = this_cpu_read(cpu_tlbstate.ctxs[0].tlb_gen);
> +
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next prev parent reply other threads:[~2017-06-06 5:03 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-05 22:36 [RFC 00/11] PCID and improved laziness Andy Lutomirski
2017-06-05 22:36 ` [RFC 01/11] x86/ldt: Simplify LDT switching logic Andy Lutomirski
2017-06-05 22:40 ` Linus Torvalds
2017-06-05 22:44 ` Andy Lutomirski
2017-06-05 22:51 ` Linus Torvalds
2017-06-05 22:36 ` [RFC 02/11] x86/mm: Remove reset_lazy_tlbstate() Andy Lutomirski
2017-06-05 22:36 ` [RFC 03/11] x86/mm: Give each mm TLB flush generation a unique ID Andy Lutomirski
2017-06-05 22:36 ` [RFC 04/11] x86/mm: Track the TLB's tlb_gen and update the flushing algorithm Andy Lutomirski
2017-06-06 5:03 ` Nadav Amit [this message]
2017-06-06 22:45 ` Andy Lutomirski
2017-06-05 22:36 ` [RFC 05/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking Andy Lutomirski
2017-06-06 1:39 ` Nadav Amit
2017-06-06 21:23 ` Andy Lutomirski
2017-06-06 19:11 ` Rik van Riel
2017-06-06 21:34 ` Andy Lutomirski
2017-06-07 3:33 ` Rik van Riel
2017-06-07 4:54 ` Andy Lutomirski
2017-06-07 5:11 ` Andy Lutomirski
2017-06-05 22:36 ` [RFC 06/11] x86/mm: Stop calling leave_mm() in idle code Andy Lutomirski
2017-06-05 22:36 ` [RFC 07/11] x86/mm: Disable PCID on 32-bit kernels Andy Lutomirski
2017-06-05 22:36 ` [RFC 08/11] x86/mm: Add nopcid to turn off PCID Andy Lutomirski
2017-06-06 3:22 ` Andi Kleen
2017-06-14 4:52 ` Andy Lutomirski
2017-06-14 9:51 ` Borislav Petkov
2017-06-05 22:36 ` [RFC 09/11] x86/mm: Teach CR3 readers about PCID Andy Lutomirski
2017-06-05 22:36 ` [RFC 10/11] x86/mm: Enable CR4.PCIDE on supported systems Andy Lutomirski
2017-06-06 21:31 ` Boris Ostrovsky
2017-06-06 21:35 ` Andy Lutomirski
2017-06-06 21:48 ` Boris Ostrovsky
2017-06-06 21:54 ` Andy Lutomirski
2017-06-05 22:36 ` [RFC 11/11] x86/mm: Try to preserve old TLB entries using PCID Andy Lutomirski
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