From: "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@intel.com>
To: lkp <lkp@intel.com>
Cc: "kbuild-all@lists.01.org" <kbuild-all@lists.01.org>,
"Linux Memory Management List" <linux-mm@kvack.org>,
"Nguyen, Anthony L" <anthony.l.nguyen@intel.com>,
"Loktionov, Aleksandr" <aleksandr.loktionov@intel.com>
Subject: RE: [linux-next:master 9824/11526] drivers/net/ethernet/intel/i40e/i40e_main.c:6715 i40e_hw_dcb_config() warn: inconsistent indenting
Date: Tue, 16 Feb 2021 22:06:19 +0000 [thread overview]
Message-ID: <DM6PR11MB46574DD13822D33E8104A2179B879@DM6PR11MB4657.namprd11.prod.outlook.com> (raw)
In-Reply-To: <202102170228.uaPLH3RL-lkp@intel.com>
>tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
>head: 6553715b6db5ff5d4898895dad1b2926cfe406cf
>commit: 4b208eaa8078113ed3f6ba7ecad1ac0a2bad4608 [9824/11526] i40e: Add init and default config of software based DCB
>config: parisc-randconfig-m031-20210216 (attached as .config)
>compiler: hppa-linux-gcc (GCC) 9.3.0
>
>If you fix the issue, kindly add following tag as appropriate
>Reported-by: kernel test robot <lkp@intel.com>
>
>New smatch warnings:
>drivers/net/ethernet/intel/i40e/i40e_main.c:6715 i40e_hw_dcb_config() warn: inconsistent indenting
>drivers/net/ethernet/intel/i40e/i40e_main.c:10522 i40e_rebuild() warn: inconsistent indenting
>
>Old smatch warnings:
>arch/parisc/include/asm/hash.h:44 __hash_32() warn: inconsistent indenting
>drivers/net/ethernet/intel/i40e/i40e_main.c:2563 i40e_sync_vsi_filters() error: we previously assumed 'vsi->netdev' could be null (see line 2315)
>drivers/net/ethernet/intel/i40e/i40e_main.c:15078 i40e_init_recovery_mode() warn: missing error code 'err'
>
>vim +6715 drivers/net/ethernet/intel/i40e/i40e_main.c
>
> 6547
> 6548 /**
> 6549 * i40e_hw_dcb_config - Program new DCBX settings into HW
> 6550 * @pf: PF being configured
> 6551 * @new_cfg: New DCBX configuration
> 6552 *
> 6553 * Program DCB settings into HW and reconfigure VEB/VSIs on
> 6554 * given PF
> 6555 **/
> 6556 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
> 6557 {
> 6558 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
> 6559 u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
> 6560 u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
> 6561 struct i40e_dcbx_config *old_cfg;
> 6562 u8 mode[I40E_MAX_TRAFFIC_CLASS];
> 6563 struct i40e_rx_pb_config pb_cfg;
> 6564 struct i40e_hw *hw = &pf->hw;
> 6565 u8 num_ports = hw->num_ports;
> 6566 bool need_reconfig;
> 6567 int ret = -EINVAL;
> 6568 u8 lltc_map = 0;
> 6569 u8 tc_map = 0;
> 6570 u8 new_numtc;
> 6571 u8 i;
> 6572
> 6573 dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
> 6574 /* Un-pack information to Program ETS HW via shared API
> 6575 * numtc, tcmap
> 6576 * LLTC map
> 6577 * ETS/NON-ETS arbiter mode
> 6578 * max exponent (credit refills)
> 6579 * Total number of ports
> 6580 * PFC priority bit-map
> 6581 * Priority Table
> 6582 * BW % per TC
> 6583 * Arbiter mode between UPs sharing same TC
> 6584 * TSA table (ETS or non-ETS)
> 6585 * EEE enabled or not
> 6586 * MFS TC table
> 6587 */
> 6588
> 6589 new_numtc = i40e_dcb_get_num_tc(new_cfg);
> 6590
> 6591 memset(&ets_data, 0, sizeof(ets_data));
> 6592 for (i = 0; i < new_numtc; i++) {
> 6593 tc_map |= BIT(i);
> 6594 switch (new_cfg->etscfg.tsatable[i]) {
> 6595 case I40E_IEEE_TSA_ETS:
> 6596 prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
> 6597 ets_data.tc_bw_share_credits[i] =
> 6598 new_cfg->etscfg.tcbwtable[i];
> 6599 break;
> 6600 case I40E_IEEE_TSA_STRICT:
> 6601 prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
> 6602 lltc_map |= BIT(i);
> 6603 ets_data.tc_bw_share_credits[i] =
> 6604 I40E_DCB_STRICT_PRIO_CREDITS;
> 6605 break;
> 6606 default:
> 6607 /* Invalid TSA type */
> 6608 need_reconfig = false;
> 6609 goto out;
> 6610 }
> 6611 }
> 6612
> 6613 old_cfg = &hw->local_dcbx_config;
> 6614 /* Check if need reconfiguration */
> 6615 need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
> 6616
> 6617 /* If needed, enable/disable frame tagging, disable all VSIs
> 6618 * and suspend port tx
> 6619 */
> 6620 if (need_reconfig) {
> 6621 /* Enable DCB tagging only when more than one TC */
> 6622 if (new_numtc > 1)
> 6623 pf->flags |= I40E_FLAG_DCB_ENABLED;
> 6624 else
> 6625 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
> 6626
> 6627 set_bit(__I40E_PORT_SUSPENDED, pf->state);
> 6628 /* Reconfiguration needed quiesce all VSIs */
> 6629 i40e_pf_quiesce_all_vsi(pf);
> 6630 ret = i40e_suspend_port_tx(pf);
> 6631 if (ret)
> 6632 goto err;
> 6633 }
> 6634
> 6635 /* Configure Port ETS Tx Scheduler */
> 6636 ets_data.tc_valid_bits = tc_map;
> 6637 ets_data.tc_strict_priority_flags = lltc_map;
> 6638 ret = i40e_aq_config_switch_comp_ets
> 6639 (hw, pf->mac_seid, &ets_data,
> 6640 i40e_aqc_opc_modify_switching_comp_ets, NULL);
> 6641 if (ret) {
> 6642 dev_info(&pf->pdev->dev,
> 6643 "Modify Port ETS failed, err %s aq_err %s\n",
> 6644 i40e_stat_str(&pf->hw, ret),
> 6645 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
> 6646 goto out;
> 6647 }
> 6648
> 6649 /* Configure Rx ETS HW */
> 6650 memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
> 6651 i40e_dcb_hw_set_num_tc(hw, new_numtc);
> 6652 i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN,
> 6653 I40E_DCB_ARB_MODE_STRICT_PRIORITY,
> 6654 I40E_DCB_DEFAULT_MAX_EXPONENT,
> 6655 lltc_map);
> 6656 i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports);
> 6657 i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode,
> 6658 prio_type);
> 6659 i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable,
> 6660 new_cfg->etscfg.prioritytable);
> 6661 i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable);
> 6662
> 6663 /* Configure Rx Packet Buffers in HW */
> 6664 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
> 6665 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu;
> 6666 mfs_tc[i] += I40E_PACKET_HDR_PAD;
> 6667 }
> 6668
> 6669 i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
> 6670 false, new_cfg->pfc.pfcenable,
> 6671 mfs_tc, &pb_cfg);
> 6672 i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
> 6673
> 6674 /* Update the local Rx Packet buffer config */
> 6675 pf->pb_cfg = pb_cfg;
> 6676
> 6677 /* Inform the FW about changes to DCB configuration */
> 6678 ret = i40e_aq_dcb_updated(&pf->hw, NULL);
> 6679 if (ret) {
> 6680 dev_info(&pf->pdev->dev,
> 6681 "DCB Updated failed, err %s aq_err %s\n",
> 6682 i40e_stat_str(&pf->hw, ret),
> 6683 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
> 6684 goto out;
> 6685 }
> 6686
> 6687 /* Update the port DCBx configuration */
> 6688 *old_cfg = *new_cfg;
> 6689
> 6690 /* Changes in configuration update VEB/VSI */
> 6691 i40e_dcb_reconfigure(pf);
> 6692 out:
> 6693 /* Re-start the VSIs if disabled */
> 6694 if (need_reconfig) {
> 6695 ret = i40e_resume_port_tx(pf);
> 6696
> 6697 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
> 6698 /* In case of error no point in resuming VSIs */
> 6699 if (ret)
> 6700 goto err;
> 6701
> 6702 /* Wait for the PF's queues to be disabled */
> 6703 ret = i40e_pf_wait_queues_disabled(pf);
> 6704 if (ret) {
> 6705 /* Schedule PF reset to recover */
> 6706 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
> 6707 i40e_service_event_schedule(pf);
> 6708 goto err;
> 6709 } else {
> 6710 i40e_pf_unquiesce_all_vsi(pf);
> 6711 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
> 6712 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
> 6713 }
> 6714 /* registers are set, lets apply */
>> 6715 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB)
> 6716 ret = i40e_hw_set_dcb_config(pf, new_cfg);
> 6717 }
> 6718
> 6719 err:
> 6720 return ret;
> 6721 }
> 6722
>
>---
>0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
>
I am working on a fix for those
prev parent reply other threads:[~2021-02-16 22:06 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-16 18:05 kernel test robot
2021-02-16 22:06 ` Kubalewski, Arkadiusz [this message]
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